2018-04-27 |
types: use int-ll64 for both aarch32 and aarch64
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Since commit 031dbb122472 ("AArch32: Add essential Arch helpers"),
it is difficult to use consistent format strings for printf() family
between aarch32 and aarch64.
For example, uint64_t is defined as 'unsigned long long' for aarch32
and as 'unsigned long' for aarch64. Likewise, uintptr_t is defined
as 'unsigned int' for aarch32, and as 'unsigned long' for aarch64.
A problem typically arises when you use printf() in common code.
One solution could be, to cast the arguments to a type long enough
for both architectures. For example, if 'val' is uint64_t type,
like this:
printf("val = %llx\n", (unsigned long long)val);
Or, somebody may suggest to use a macro provided by <inttypes.h>,
like this:
printf("val = %" PRIx64 "\n", val);
But, both would make the code ugly.
The solution adopted in Linux kernel is to use the same typedefs for
all architectures. The fixed integer types in the kernel-space have
been unified into int-ll64, like follows:
typedef signed char int8_t;
typedef unsigned char uint8_t;
typedef signed short int16_t;
typedef unsigned short uint16_t;
typedef signed int int32_t;
typedef unsigned int uint32_t;
typedef signed long long int64_t;
typedef unsigned long long uint64_t;
[ Linux commit: 0c79a8e ]
This gets along with the codebase shared between 32 bit and 64 bit,
with the data model called ILP32, LP64, respectively.
The width for primitive types is defined as follows:
ILP32 LP64
int 32 32
long 32 64
long long 64 64
pointer 32 64
'long long' is 64 bit for both, so it is used for defining uint64_t.
'long' has the same width as pointer, so for uintptr_t.
We still need an ifdef conditional for (s)size_t.
All 64 bit architectures use "unsigned long" size_t, and most 32 bit
architectures use "unsigned int" size_t. H8/300, S/390 are known as
exceptions; they use "unsigned long" size_t despite their architecture
is 32 bit.
One idea for simplification might be to define size_t as 'unsigned long'
across architectures, then forbid the use of "%z" string format.
However, this would cause a distortion between size_t and sizeof()
operator. We have unknowledge about the native type of sizeof(), so
we need a guess of it anyway. I want the following formula to always
return 1:
__builtin_types_compatible_p(size_t, typeof(sizeof(int)))
Fortunately, ARM is probably a majority case. As far as I know, all
32 bit ARM compilers use "unsigned int" size_t.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada
committed
on 27 Apr 2018
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arch_helpers: use u_register_t for register read/write
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u_register_t is preferred rather than uint64_t. This is more
consistent with the aarch32 implementation.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada
committed
on 27 Apr 2018
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2018-04-18 |
Merge pull request #1357 from antonio-nino-diaz-arm/an/fix-misra
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Fix some MISRA defects in SPM code
Dimitris Papastamos
authored
on 18 Apr 2018
GitHub
committed
on 18 Apr 2018
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2018-04-17 |
Fix some MISRA defects in SPM code
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Change-Id: I989c1f4aef8e3cb20d5d19e6347575e6449bb60b
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz
committed
on 17 Apr 2018
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2018-04-16 |
Merge pull request #1356 from robertovargas-arm/misra-changes
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Misra changes
Dimitris Papastamos
authored
on 16 Apr 2018
GitHub
committed
on 16 Apr 2018
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2018-04-13 |
Fix MISRA rule 8.4 Part 4
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Rule 8.4: A compatible declaration shall be visible when
an object or function with external linkage is defined
Fixed for:
make DEBUG=1 PLAT=fvp SPD=tspd TRUSTED_BOARD_BOOT=1 \
GENERATE_COT=1 ARM_ROTPK_LOCATION=devel_rsa \
ROT_KEY=arm_rotprivk_rsa.pem MBEDTLS_DIR=mbedtls all
Change-Id: Ie4cd6011b3e4fdcdd94ccb97a7e941f3b5b7aeb8
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
Roberto Vargas
committed
on 13 Apr 2018
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Fix MISRA rule 8.3 Part 4
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Rule 8.3: All declarations of an object or function shall
use the same names and type qualifiers
Fixed for:
make DEBUG=1 PLAT=fvp SPD=tspd TRUSTED_BOARD_BOOT=1 \
GENERATE_COT=1 ARM_ROTPK_LOCATION=devel_rsa \
ROT_KEY=arm_rotprivk_rsa.pem MBEDTLS_DIR=mbedtls all
Change-Id: Ia34fe1ae1f142e89c9a6c19831e3daf4d28f5831
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
Roberto Vargas
committed
on 13 Apr 2018
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Fix MISRA rule 8.5 in common code
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Rule 8.5: An external object or function shall be declared
once in one and only one file.
Change-Id: I7c3d4ec7d3ba763fdb4600008ba10b4b93ecdfce
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
Roberto Vargas
committed
on 13 Apr 2018
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2018-04-12 |
Check presence of fix for errata 843419 in Cortex-A53
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A fix for errata 843419 may be available in revision r0p4 of the
Cortex-A53 processor. The presence of the fix is determined by checking
bit 8 in the REVIDR register.
If the fix is present we report ERRATA_NOT_APPLIES which silences the
erroneous 'missing workaround' warning.
Change-Id: Ibd2a478df3e2a6325442a6a48a0bb0259dcfc1d7
Signed-off-by: Jonathan Wright <jonathan.wright@arm.com>
Jonathan Wright
committed
on 12 Apr 2018
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2018-04-11 |
Merge pull request #1342 from Summer-ARM/sq/support-tzmp1
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support tzmp1
Dimitris Papastamos
authored
on 11 Apr 2018
GitHub
committed
on 11 Apr 2018
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2018-04-10 |
Merge pull request #1348 from amitdanielkachhap/dmc500_single_if_v2
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DMC500: Add platform support to set system interface count
Dimitris Papastamos
authored
on 10 Apr 2018
GitHub
committed
on 10 Apr 2018
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plat/arm: Allow override of default TZC regions
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This patch allows the ARM Platforms to specify the TZC regions to be
specified to the ARM TZC helpers in arm_tzc400.c and arm_tzc_dmc500.c.
If the regions are not specified then the default TZC region will be
configured by these helpers.
This override mechanism allows specifying special regions for TZMP1
usecase.
Signed-off-by: Summer Qin <summer.qin@arm.com>
Summer Qin
committed
on 10 Apr 2018
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2018-04-09 |
DMC500: Add platform support to set system interface count
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Some low end platforms using DMC500 memory controller do not have
CCI(Cache Coherent Interconnect) interface and only have non-coherent
system interface support. Hence this patch makes the system interface
count configurable from the platforms.
Change-Id: I6d54c90eb72fd18026c6470c1f7fd26c59dc4b9a
Signed-off-by: Amit Daniel Kachhap <amit.kachhap@arm.com>
Amit Daniel Kachhap
committed
on 9 Apr 2018
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2018-04-06 |
fix instruction address range limitation
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For the adr instruction, it require the label's offset from the
address of this instruction must be in the range +/-1MB. If the
option "BL2_IN_XIP_MEM" is set to '1', in some cases, BL2's RW
memory will not in the range of +/-1MB from BL2's RO memory region.
so we need to use ldr instruction to cover this case.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Jiafei Pan
committed
on 6 Apr 2018
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Add support for BL2 in XIP memory
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In some use-cases BL2 will be stored in eXecute In Place (XIP) memory,
like BL1. In these use-cases, it is necessary to initialize the RW sections
in RAM, while leaving the RO sections in place. This patch enable this
use-case with a new build option, BL2_IN_XIP_MEM. For now, this option
is only supported when BL2_AT_EL3 is 1.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Jiafei Pan
committed
on 6 Apr 2018
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2018-04-03 |
Merge pull request #1334 from michpappas/tf-issues#572_qemu_dont_use_C_for_crash_console
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qemu: don't use C functions for the crash console callbacks
Dimitris Papastamos
authored
on 3 Apr 2018
GitHub
committed
on 3 Apr 2018
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2018-03-31 |
qemu: don't use C functions for the crash console callbacks
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Use the console_pl011_core_* functions directly in the crash console
callbacks.
This bypasses the MULTI_CONSOLE_API for the crash console (UART1), but
allows using the crash console before the C runtime has been initialized
(eg to call ASM_ASSERT). This retains backwards compatibility with respect
to functionality when the old API is used.
Use the MULTI_CONSOLE_API to register UART0 as the boot and runtime
console.
Fixes ARM-software/tf-issues#572
Signed-off-by: Michalis Pappas <mpappas@fastmail.fm>
Michalis Pappas
committed
on 31 Mar 2018
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2018-03-29 |
Merge pull request #1313 from jonathanwright-ARM/jw/MISRA-switch-statements
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Fix switch statements to comply with MISRA rules
Dimitris Papastamos
authored
on 29 Mar 2018
GitHub
committed
on 29 Mar 2018
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Merge pull request #1333 from jeenu-arm/icfg-fix
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GIC: Fix interrupt setting interrupt configuration
Dimitris Papastamos
authored
on 29 Mar 2018
GitHub
committed
on 29 Mar 2018
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Merge pull request #1335 from JoelHutton/jh/cleanup_void_pointers
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Clean usage of void pointers to access symbols
Dimitris Papastamos
authored
on 29 Mar 2018
GitHub
committed
on 29 Mar 2018
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2018-03-27 |
Clean usage of void pointers to access symbols
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Void pointers have been used to access linker symbols, by declaring an
extern pointer, then taking the address of it. This limits symbols
values to aligned pointer values. To remove this restriction an
IMPORT_SYM macro has been introduced, which declares it as a char
pointer and casts it to the required type.
Change-Id: I89877fc3b13ed311817bb8ba79d4872b89bfd3b0
Signed-off-by: Joel Hutton <Joel.Hutton@Arm.com>
Joel Hutton
committed
on 27 Mar 2018
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2018-03-26 |
lib: fix switch statements to comply with MISRA rules
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Ensure (where possible) that switch statements in lib comply with MISRA
rules 16.1 - 16.7.
Change-Id: I52bc896fb7094d2b7569285686ee89f39f1ddd84
Signed-off-by: Jonathan Wright <jonathan.wright@arm.com>
Jonathan Wright
committed
on 26 Mar 2018
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GIC: Fix setting interrupt configuration
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- Interrupt configuration is a 2-bit field, so the field shift has to
be double that of the bit number.
- Interrupt configuration (level- or edge-trigger) is specified in the
MSB of the field, not LSB.
Fixes applied to both GICv2 and GICv3 drivers.
Fixes ARM-software/tf-issues#570
Change-Id: Ia6ae6ed9ba9fb0e3eb0f921a833af48e365ba359
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
Jeenu Viswambharan
committed
on 26 Mar 2018
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2018-03-24 |
qemu: MULTI_CONSOLE_API=0 causes build error
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Add crash_console_init declaration to console.h
Only enable MULTI_CONSOLE_API for AArch64
Fixes ARM-software/tf-issues#571
Signed-off-by: Michalis Pappas <mpappas@fastmail.fm>
Michalis Pappas
committed
on 24 Mar 2018
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2018-03-21 |
Rename 'smcc' to 'smccc'
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When the source code says 'SMCC' it is talking about the SMC Calling
Convention. The correct acronym is SMCCC. This affects a few definitions
and file names.
Some files have been renamed (smcc.h, smcc_helpers.h and smcc_macros.S)
but the old files have been kept for compatibility, they include the
new ones with an ERROR_DEPRECATED guard.
Change-Id: I78f94052a502436fdd97ca32c0fe86bd58173f2f
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz
committed
on 21 Mar 2018
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2018-03-14 |
Fixup `SMCCC_ARCH_FEATURES` semantics
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When querying `SMCCC_ARCH_WORKAROUND_1` through `SMCCC_ARCH_FEATURES`,
return either:
* -1 to indicate the PE on which `SMCCC_ARCH_FEATURES` is called
requires firmware mitigation for CVE-2017-5715 but the mitigation
is not compiled in.
* 0 to indicate that firmware mitigation is required, or
* 1 to indicate that no firmware mitigation is required.
This patch complies with v1.2 of the firmware interfaces
specification (ARM DEN 0070A).
Change-Id: Ibc32d6620efdac6c340758ec502d95554a55f02a
Signed-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com>
Dimitris Papastamos
committed
on 14 Mar 2018
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Use PFR0 to identify need for mitigation of CVE-2017-5715
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If the CSV2 field reads as 1 then branch targets trained in one
context cannot affect speculative execution in a different context.
In that case skip the workaround on Cortex A72 and A73.
Change-Id: Ide24fb6efc77c548e4296295adc38dca87d042ee
Signed-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com>
Dimitris Papastamos
committed
on 14 Mar 2018
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2018-03-03 |
Merge pull request #1292 from danh-arm/dh/spurious-dep-warn
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Suppress spurious deprecated declaration warnings
davidcunado-arm
authored
on 3 Mar 2018
GitHub
committed
on 3 Mar 2018
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2018-03-02 |
Remove sp_min functions from plat_common.c
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This patch removes default platform implementations of sp_min
platform APIs from plat/common/aarch32/plat_common.c. The APIs
are now implemented in `plat_sp_min_common.c` file within the
same folder.
The ARM platform layer had a weak definition of sp_min_platform_setup2()
which conflicted with the weak definition in the common file. Hence this
patch fixes that by introducing a `plat_arm_` version of the API thus
allowing individual boards within ARM platforms to override it if they
wish to.
Fixes ARM-software/tf-issues#559
Change-Id: I11a74ecae8191878ccc7ea03f12bdd5ae88faba5
Signed-off-by: Soby Mathew <soby.mathew@arm.com>
Soby Mathew
committed
on 2 Mar 2018
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2018-03-01 |
Emit warnings when using deprecated GIC init
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Emit runtime warnings when intializing the GIC drivers using the
deprecated method of defining integer interrupt arrays in the GIC driver
data structures; interrupt_prop_t arrays should be used instead. This
helps platforms detect that they have migration work to do. Previously,
no warning was emitted in this case. This affects both the GICv2 and GICv3
drivers.
Also use the __deprecated attribute to emit a build time warning if these
deprecated fields are used. These warnings are suppressed in the GIC
driver compatibility functions but will be visible if platforms use them.
Change-Id: I6b6b8f6c3b4920c448b6dcb82fc18442cfdf6c7a
Signed-off-by: Dan Handley <dan.handley@arm.com>
Dan Handley
committed
on 1 Mar 2018
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