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History for arm-trusted-firmware / plat / nvidia / tegra / soc / t132 / platform_t132.mk

2015-07-31	2ee2c4f Browse files » Tegra132: set TZDRAM_BASE to 0xF5C00000 ... The TZDRAM base on the reference platform has been bumped up due to some BL2 memory cleanup. Platforms can also use a different TZDRAM base by setting TZDRAM_BASE=<value> in the build command line. Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Varun Wadekar committed on 31 Jul 2015
2015-07-23	e7d4caa Browse files » Tegra: Support for Tegra's T132 platforms ... This patch implements support for T132 (Denver CPU) based Tegra platforms. The following features have been added: * SiP calls to switch T132 CPU's AARCH mode * Complete PSCI support, including 'System Suspend' * Platform specific MMIO settings * Locking of CPU vector registers Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Varun Wadekar committed on 23 Jul 2015

2015-07-31

2ee2c4f
Browse files »

Tegra132: set TZDRAM_BASE to 0xF5C00000 ...

The TZDRAM base on the reference platform has been bumped up due to
some BL2 memory cleanup. Platforms can also use a different TZDRAM
base by setting TZDRAM_BASE=<value> in the build command line.

Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

Varun Wadekar committed on 31 Jul 2015

2015-07-23

e7d4caa
Browse files »

Tegra: Support for Tegra's T132 platforms ...

This patch implements support for T132 (Denver CPU) based Tegra
platforms.

The following features have been added:

* SiP calls to switch T132 CPU's AARCH mode
* Complete PSCI support, including 'System Suspend'
* Platform specific MMIO settings
* Locking of CPU vector registers

Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

Varun Wadekar committed on 23 Jul 2015