console: add a flag to prepend '\r' in the multi-console framework ...

Currently, console drivers prepend '\r' to '\n' by themselves. This is
common enough to be supported in the framework.

Add a new flag, CONSOLE_FLAG_TRANSLATE_CRLF. A driver can set this
flag to ask the framework to transform LF into CRLF instead of doing
it by itself.

Change-Id: I4f5c5887591bc0a8749a105abe62b6562eaf503b
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

Replace __ASSEMBLY__ with compiler-builtin __ASSEMBLER__ ...

NOTE: __ASSEMBLY__ macro is now deprecated in favor of __ASSEMBLER__.

All common C compilers predefine a macro called __ASSEMBLER__ when
preprocessing a .S file. There is no reason for TF-A to define it's own
__ASSEMBLY__ macro for this purpose instead. To unify code with the
export headers (which use __ASSEMBLER__ to avoid one extra dependency),
let's deprecate __ASSEMBLY__ and switch the code base over to the
predefined standard.

Change-Id: Id7d0ec8cf330195da80499c68562b65cb5ab7417
Signed-off-by: Julius Werner <jwerner@chromium.org>

Merge changes from topic "gby/cryptocell-multi-vers" into integration ...

* changes:
  cryptocell: add product version awareness support
  cryptocell: move Cryptocell specific API into driver

cryptocell: add product version awareness support ...

Add support for multiple Cryptocell revisions which
use different APIs.

This commit only refactors the existing code in preperation to the addition
of another Cryptocell revisions later on.

Signed-off-by: Gilad Ben-Yossef <gilad.benyossef@arm.com>
Change-Id: I16d80b31afb6edd56dc645fee5ea619cc74f09b6

cryptocell: move Cryptocell specific API into driver ...

Code using Cryptocell specific APIs was used as part of the
arm common board ROT support, instead of being abstracted
in Cryptocell specific driver code, creating two problems:
- Any none arm board that uses Cryptocell wuld need to
  copy and paste the same code.
- Inability to cleanly support multiple versions of Cryptocell
  API and products.

Move over Cryptocell specific API calls into the Cryptocell
driver, creating abstraction API where needed.

Signed-off-by: Gilad Ben-Yossef <gilad.benyossef@arm.com>
Change-Id: I9e03ddce90fcc47cfdc747098bece86dbd11c58e

Factor out cross-BL API into export headers suitable for 3rd party code ...

This patch adds a new include/export/ directory meant for inclusion in
third-party code. This is useful for cases where third-party code needs
to interact with TF-A interfaces and data structures (such as a custom
BL2-implementation like coreboot handing off to BL31). Directly
including headers from the TF-A repository avoids having to duplicate
all these definitions (and risk them going stale), but with the current
header structure this is not possible because handoff API definitions
are too deeply intertwined with other TF code/headers and chain-include
other headers that will not be available in the other environment.

The new approach aims to solve this by separating only the parts that
are really needed into these special headers that are self-contained and
will not chain-include other (non-export) headers. TF-A code should
never include them directly but should instead always include the
respective wrapper header, which will include the required prerequisites
(like <stdint.h>) before including the export header. Third-party code
can include the export headers via its own wrappers that make sure the
necessary definitions are available in whatever way that environment can
provide them.

Change-Id: Ifd769320ba51371439a8e5dd5b79c2516c3b43ab
Signed-off-by: Julius Werner <jwerner@chromium.org>

Update base code to not rely on undefined overflow behaviour ...

This consists of ensuring that the left operand of each shift is
unsigned when the operation might overflow into the sign bit.

Change-Id: Iddd6f38139a4c6e500468b4fc48d04e0939f574e
Signed-off-by: Justin Chadwell <justin.chadwell@arm.com>

Remove MULTI_CONSOLE_API flag and references to it ...

The new API becomes the default one.

Change-Id: Ic1d602da3dff4f4ebbcc158b885295c902a24fec
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>

Merge changes from topic "yg/clk_syscfg_dt" into integration ...

* changes:
  fdts: stm32mp1: realign device tree files with internal devs
  stm32mp1: increase device tree size to 20kB
  stm32mp1: make dt_get_stdout_node_offset() static
  stm32mp1: use unsigned values for SDMMC defines
  stm32mp1: remove useless LIBFDT_SRCS from PLAT_BL_COMMON_SOURCES
  stm32mp1: update doc for U-Boot compilation
  stm32mp1: add general SYSCFG management
  stm32mp1: move stm32_get_gpio_bank_clock() to private file
  clk: stm32mp1: correctly handle Clock Spreading Generator
  clk: stm32mp1: use defines for mask values in stm32mp1_clk_sel array
  clk: stm32mp1: move oscillator functions to generic file
  arch: add some defines for generic timer registers

Merge changes If61ab215,I3e8b0251,I1757eee9,I81b48475,I46b445a7, ... into integration ...

* changes:
  rcar_gen3: drivers: qos: Move QoS drivers out of staging
  rcar_gen3: drivers: qos: V3M: Configure DBSC QoS from a table
  rcar_gen3: drivers: qos: E3: Configure DBSC QoS from a table
  rcar_gen3: drivers: qos: D3: Configure DBSC QoS from a table
  rcar_gen3: drivers: qos: M3N: Configure DBSC QoS from a table
  rcar_gen3: drivers: qos: M3W: Configure DBSC QoS from a table
  rcar_gen3: drivers: qos: H3: Configure DBSC QoS from a table
  rcar_gen3: drivers: qos: Add function to configure DBSC QoS settings from a table
  rcar_gen3: drivers: qos: Fix checkpatch issues
  rcar_gen3: drivers: qos: V3M: Drop useless comments
  rcar_gen3: drivers: qos: V3M: Convert mstat table to uint64_t
  rcar_gen3: drivers: qos: V3M: Factor out mstat fix into separate file
  rcar_gen3: drivers: qos: V3M: Use common register definition
  rcar_gen3: drivers: qos: E3: Drop extra level of nesting
  rcar_gen3: drivers: qos: E3: Use common register definition
  rcar_gen3: drivers: qos: D3: Replace ad-hoc register addresses with macros
  rcar_gen3: drivers: qos: D3: Drop MD pin check
  rcar_gen3: drivers: qos: D3: Make DBSC settings local to dbsc_setting()
  rcar_gen3: drivers: qos: D3: Drop useless comments
  rcar_gen3: drivers: qos: D3: Convert mstat table to uint64_t
  rcar_gen3: drivers: qos: D3: Factor out mstat fix into separate file
  rcar_gen3: drivers: qos: D3: Use common register definition
  rcar_gen3: drivers: qos: M3N: Fix checkpatch issues
  rcar_gen3: drivers: qos: M3N: Drop MD pin check
  rcar_gen3: drivers: qos: M3N: Drop useless comments
  rcar_gen3: drivers: qos: M3N: Drop extra level of nesting
  rcar_gen3: drivers: qos: M3N: Use common register definition
  rcar_gen3: drivers: qos: M3W: Fix checkpatch issues
  rcar_gen3: drivers: qos: M3W: Drop MD pin check
  rcar_gen3: drivers: qos: M3W: Drop useless comments
  rcar_gen3: drivers: qos: M3W: Drop extra level of nesting
  rcar_gen3: drivers: qos: M3W: Convert mstat table to uint64_t
  rcar_gen3: drivers: qos: M3W: Factor out mstat fix into separate file
  rcar_gen3: drivers: qos: M3W: Use common register definition
  rcar_gen3: drivers: qos: H3: Fix checkpatch issues
  rcar_gen3: drivers: qos: H3: Drop MD pin check
  rcar_gen3: drivers: qos: H3: Drop useless comments
  rcar_gen3: drivers: qos: H3: Drop extra level of nesting
  rcar_gen3: drivers: qos: H3: Convert mstat table to uint64_t
  rcar_gen3: drivers: qos: H3: Factor out mstat fix into separate file
  rcar_gen3: drivers: qos: H3: Use common register definition
  rcar_gen3: console: Convert to multi-console API

clk: stm32mp1: use defines for mask values in stm32mp1_clk_sel array ...

Rework the macro that eases the table definition: the src and msk fields
are now using MASK and SHIFT defines of each source register.
Some macros had then to be modified: _USART1_SEL, _ASS_SEL and _MSS_SEL to
_UART1_SEL, _AXIS_SEL, and _MCUS_SEL to match register fields.

Note: the mask for RCC_ASSCKSELR_AXISSRC is changed from 0x3 to 0x7
to reflect the size of the register field, even if there are only
3 possible clock sources.

The mask value is also corrected for QSPI and FMC clock selection.

Change-Id: I44114e3c1dd37b9fa1be1ba519611abd9a07764c
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>

clk: stm32mp1: move oscillator functions to generic file ...

Those functions are generic for parsing nodes from device tree
hence could be located in generic source file.

The oscillators description structure is also moved to STM32MP1 clock
driver, as it is no more used in stm32mp1_clkfunc and cannot be in a
generic file.

Change-Id: I93ba74f4eea916440fef9b160d306af1b39f17c6
Signed-off-by: Yann Gautier <yann.gautier@st.com>

rcar_gen3: console: Convert to multi-console API ...

Convert the R-Car Gen3 platform and both SCIF and Log drivers
to multi-console API.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I18556973937d150b60453f9150d54ee612571e35

Fix type of cot_desc_ptr ...

The chain of trust description and the pointer pointing to its first
element were incompatible, thus requiring an explicit type cast for
the assignment.

- cot_desc was an array of
  const pointers to const image descriptors.

- cot_desc_ptr was a const pointer to
  (non-constant) pointers to const image descriptors.

Thus, trying to assign cot_desc to cot_desc_ptr (with no cast) would
generate the following compiler warning:

drivers/auth/tbbr/tbbr_cot.c:826:14: warning: initialization discards
  ‘const’ qualifier from pointer target type [-Wdiscarded-qualifiers]
 REGISTER_COT(cot_desc);
              ^~~~~~~~

Change-Id: Iae62dd1bdb43fe379e3843d96461d47cc2f68a06
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>

SMMUv3: Abort DMA transactions ...

For security DMA should be blocked at the SMMU by default
unless explicitly enabled for a device. SMMU is disabled
after reset with all streams bypassing the SMMU, and
abortion of all incoming transactions implements a default
deny policy on reset.
This patch also moves "bl1_platform_setup()" function from
arm_bl1_setup.c to FVP platforms' fvp_bl1_setup.c and
fvp_ve_bl1_setup.c files.

Change-Id: Ie0ffedc10219b1b884eb8af625bd4b6753749b1a
Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>

SMMUv3: refactor the driver code ...

This patch is a preparation for the subsequent changes in
SMMUv3 driver. It introduces a new "smmuv3_poll" function
and replaces inline functions for accessing SMMU registers
with mmio read/write operations. Also the infinite loop
for the poll has been replaced with a counter based timeout.

Change-Id: I7a0547beb1509601f253e126b1a7a6ab3b0307e7
Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>

drivers/sbsa: add sbsa watchdog driver ...

Add a driver for configuring the SBSA Generic Watchdog which aids in
the detection of errant system behaviour.

Change-Id: I5a1e7149c69fd8b85be7dfbcf511f431339946f4
Signed-off-by: Aditya Angadi <aditya.angadi@arm.com>

cot-desc: optimise memory further ...

This changes the auth_img_desc_t struct to have pointers to struct
arrays instead of struct arrays. This saves memory as many of these
were never used, and can be NULL pointers. Note the memory savings are
only when these arrays are not initialised, as it is assumed these
arrays are fixed length. A possible future optimisation could allow for
variable length.

memory diff:
bl1:        bl2:
    text        text
      -12         -12
    bss         bss
      -1463       0
    data        data
      -56         -48
    rodata      rodata
      -5688       -2592
    total       total
      -7419       -2652

Change-Id: I8f9bdedf75048b8867f40c56381e3a6dc6402bcc
Signed-off-by: Joel Hutton <Joel.Hutton@Arm.com>

Reduce memory needed for CoT description ...

When Trusted Board Boot is enabled, we need to specify the Chain of
Trust (CoT) of the BL1 and BL2 images. A CoT consists of an array
of image descriptors. The authentication module assumes that each
image descriptor in this array is indexed by its unique image
identifier. For example, the Trusted Boot Firmware Certificate has to
be at index [TRUSTED_BOOT_FW_CERT_ID].

Unique image identifiers may not necessarily be consecutive. Also,
a given BL image might not use all image descriptors. For example, BL1
does not need any of the descriptors related to BL31. As a result, the
CoT array might contain holes, which unnecessarily takes up space in
the BL binary.

Using pointers to auth_img_desc_t structs (rather than structs
themselves) means these unused elements only use 1 pointer worth of
space, rather than one struct worth of space. This patch also changes
the code which accesses this array to reflect the change to pointers.

Image descriptors not needed in BL1 or BL2 respectively are also
ifdef'd out in this patch. For example, verifying the BL31 image is
the responsibility of BL2 so BL1 does not need any of the data
structures describing BL31.

memory diff:
bl1:        bl2:
    text        text
      -20         -20
    bss         bss
      -1463       0
    data        data
      -256        -48
    rodata      rodata
      -5240       -1952
    total       total
      -6979       -2020

Change-Id: I163668b174dc2b9bbb183acec817f2126864aaad
Signed-off-by: Joel Hutton <Joel.Hutton@Arm.com>

tzc: remove deprecated types ...

Types tzc_action_t and tzc_region_attributes_t are deprecated.

Change-Id: Ieefeb8521a0e1130f39d09b5c0d2728f05084773
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>

meson/gxl: Add support for SHA256 DMA engine ...

In order to configure and boot SCP, BL31 has to compute and send
the SHA-256 of the firmware data via scpi. Luckily Amlogic GXL SOC
has a DMA facility that could be used to offload SHA-256
computations. This adds basic support of this hardware SHA-256
engine.

Signed-off-by: Remi Pommarel <repk@triplefau.lt>

Remove several warnings reported with W=1 ...

Improved support for W=1 compilation flag by solving missing-prototypes
and old-style-definition warnings.

The libraries are compiling with warnings (which turn into errors with
the Werror flag).

Outside of libraries, some warnings cannot be fixed without heavy
structural changes.

Change-Id: I1668cf99123ac4195c2a6a1d48945f7a64c67f16
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>

Merge pull request #1879 from pbeesley-arm/pb/todo-removal ...

Pb/todo removal

Merge pull request #1858 from thloh85-intel/dwmmc_fixes ...

drivers: synopsys: Fix synopsys MMC driver

plat/arm: mhu: make mhu driver generic ...

MHU doorbell driver requires arm platform specific
macro "PLAT_CSS_MHU_BASE".
Rename it to "PLAT_MHUV2_BASE", so that platforms other than arm
can use generic MHU doorbell driver.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>

drivers: Remove TODO from io_storage ...

This TODO was added five years ago so I assume that there is not
going to be a shutdown API added after all.

Change-Id: If0f4e2066454df773bd9bf41ed65d3a10248a2d3
Signed-off-by: Paul Beesley <paul.beesley@arm.com>

drivers: synopsys: Fix synopsys MMC driver ...

There are some issues with synopsys MMC driver:
- CMD8 should not expect data (for SD)
- ACMD51 should expect data (Send SCR for SD)
- dw_prepare should not dictate size to be MMC_BLOCK_SIZE, block size is
now handled in the dw_prepare function
- after the CMD completes, when doing dw_read, we need to invalidate cache
and wait for the data transfer to complete
- Need to set FIFO threshold, otherwise DMA might never get the interrupt
to read or write

Signed-off-by: Tien Hock, Loh <tien.hock.loh@intel.com>

Merge pull request #1863 from thloh85-intel/mmc_fixes ...

drivers: mmc: Fix some issues with MMC stack

drivers: mmc: Fix some issues with MMC stack ...

Some bugs in MMC stack needs to be fixed:
- scr cannot be local as this will cause cache issue when invalidating
after the read DMA transfer is completed
- ACMD41 needs to send voltage information in initialization, otherwise the
command is a query, thus will not initialize the controller
- when checking device state, retry until the retries counter goes to zero
before failing

Signed-off-by: Tien Hock, Loh <tien.hock.loh@intel.com>

rpi3: sdhost: SDHost driver improvement ...

This commit improves the SDHost driver for RPi3 as following:
 * Unblock MMC_CMD(17). Using MMC_CMD(17) is more efficient on
   block reading.
 * In some low probability that SEND_OP_COND might results CRC7
   error. We can consider that the command runs correctly. We don't
   need to retry this command so removing the code for retry.
 * Using MMC_BUS_WIDTH_1 as MMC default value to improve the stability.
 * Increase the clock to 50Mhz in data mode to speed up the io.
 * Change the pull resistors configuration to gain more stability.

Signed-off-by: Ying-Chun Liu (PaulLiu) <paulliu@debian.org>