2019-08-02 |
meson: gxl: Fix CPU hotplug
...
The CPU[1-3] are reset to initial/cold boot state (with their reset
address set to 0x0). In this state the cpus are waiting for another
one to set the reset address to bl31_warm_entrypoint and wake them up.
The CPU0 needs a bit of a workaround as changing the reset address
either through PSCI mailbox or the mmio mapped RVBAR (at 0xda834650)
does not seem to have any effect. Thus the workaround consists in
emulating the other CPUs' behavior with a WFE loop and manually jumping
to bl31_warm_entrypoint when woken back up by another one.
Change-Id: I11265620b5fd0619285e3993253a3f9a3ff6a7a4
Signed-off-by: Remi Pommarel <repk@triplefau.lt>
Remi Pommarel
committed
on 2 Aug 2019
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meson: gxl: Fix reset and power off
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Before CPU enters standby state (wfi), the AP needs to signal the SCP
through PSCI mailbox.
Also at boot time the AP has to wait for the SCP to be ready before
sending the first scpi commands or it can crash.
Change-Id: Iacc99f5bec745ad71922c5ea07ca5b87088133b6
Signed-off-by: Remi Pommarel <repk@triplefau.lt>
Remi Pommarel
committed
on 2 Aug 2019
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2019-06-28 |
Remove MULTI_CONSOLE_API flag and references to it
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The new API becomes the default one.
Change-Id: Ic1d602da3dff4f4ebbcc158b885295c902a24fec
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
Ambroise Vincent
committed
on 28 Jun 2019
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2019-05-16 |
plat/meson/gxl: BL31: remove BL2 dependency
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Remove an assert() that assumes a specific value being passed from
BL2. This value is dependent on BL2 version, so makes this assert()
not portable.
Suggested-by: Remi Pommarel <repk@triplefau.lt>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Change-Id: Ife3d934b2fa37fc1c66963dd4eb1afe2ca17d740
Kevin Hilman
committed
on 16 May 2019
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2019-04-02 |
meson/gxl: Add tool to create bl31 bootable images
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GXL platforms need to have a specific header at the beginning of bl31
image to be able to boot. This adds a tool to create that and calls it at
build time.
Signed-off-by: Remi Pommarel <repk@triplefau.lt>
Remi Pommarel
committed
on 2 Apr 2019
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meson/gxl: Configure and boot SCP
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On Amlogic gxl (s905x) SOC, in order to use SCP, bl31 has to send bl30
and bl301 firmware along with their SHA256 hash over scpi.
Signed-off-by: Remi Pommarel <repk@triplefau.lt>
Remi Pommarel
committed
on 2 Apr 2019
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meson/gxl: Add support for SHA256 DMA engine
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In order to configure and boot SCP, BL31 has to compute and send
the SHA-256 of the firmware data via scpi. Luckily Amlogic GXL SOC
has a DMA facility that could be used to offload SHA-256
computations. This adds basic support of this hardware SHA-256
engine.
Signed-off-by: Remi Pommarel <repk@triplefau.lt>
Remi Pommarel
committed
on 2 Apr 2019
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meson/gxl: Initial port of Amlogic Meson S905x (GXL)
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The Amlogic Meson S905x is a SoC with a quad core Arm Cortex-A53 running
at 1.5Ghz. It also contains a Cortex-M3 used as SCP.
This port is a minimal implementation of BL31 capable of booting
mainline U-Boot and Linux:
- Partial SCPI support.
- Basic PSCI support (CPU_ON, SYSTEM_RESET, SYSTEM_OFF).
- GICv2 driver set up.
- Basic SIP services (read efuse data, enable/disable JTAG).
This port has been tested on a lepotato.
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Signed-off-by: Remi Pommarel <repk@triplefau.lt>
Antonio Nino Diaz
authored
on 4 Dec 2018
Remi Pommarel
committed
on 2 Apr 2019
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