2018-03-15 |
Update Arm TF references to TF-A
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Update Arm Trusted Firmware references in the upstream documents to
Trusted Firmware-A (TF-A). This is for consistency with and
disambiguation from Trusted Firmware-M (TF-M).
Also update other Arm trademarks, e.g. ARM->Arm, ARMv8->Armv8-A.
Change-Id: I8bb0e18af29c6744eeea2dc6c08f2c10b20ede22
Signed-off-by: Dan Handley <dan.handley@arm.com>
Signed-off-by: David Cunado <david.cunado@arm.com>
Dan Handley
authored
on 1 Mar 2018
David Cunado
committed
on 15 Mar 2018
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2018-03-05 |
hikey960: migrate to bl2_el3
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Since non-TF ROM is used in HiKey960 platform (Hisilicon Hi3660 SoC),
replace BL1 by BL2_EL3 in normal boot mode.
When flush images in recovery mode, keep to use BL1.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Haojian Zhuang
committed
on 5 Mar 2018
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2018-03-04 |
hikey: migrate to bl2_el3
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Since non-TF ROM is used in HiKey platform (Hisilicon Hi6220 SoC),
replace BL1 by BL2_EL3 in normal boot mode.
When we recovery images in recovery mode, keep to use BL1.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Haojian Zhuang
committed
on 4 Mar 2018
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2018-01-28 |
docs: hikey: Fix typo
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The correct name of the manufacturer is LeMaker.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Andreas Färber
committed
on 28 Jan 2018
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2018-01-24 |
uniphier: switch to BL2-AT-EL3 and remove BL1 support
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UniPhier platform implements non-TF boot ROM. Prior to the BL2-AT-EL3
support, BL1 (worked as a pseudo ROM) was needed just for ensuring BL2
is entered at EL1-S. Now, this platform is able to avoid this waste.
Enable the BL2_AT_EL3 option, and remove BL1.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada
committed
on 24 Jan 2018
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2017-12-19 |
doc: uniphier: reformat reStructuredText manually
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Commit 6f6257476754 ("Convert documentation to reStructuredText")
automatically converted all documents by a tool. I see some parts
were converted in an ugly way (or, at least, it is not my intention).
Also, the footnote is apparently broken.
I checked this document by my eyes, and reformated it so that it looks
nicer both in plain text and reST form.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada
committed
on 19 Dec 2017
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2017-12-09 |
Merge pull request #1186 from antonio-nino-diaz-arm/an/poplar-doc
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poplar: Fix format of documentation
davidcunado-arm
authored
on 9 Dec 2017
GitHub
committed
on 9 Dec 2017
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2017-12-06 |
poplar: Fix format of documentation
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The document was being rendered incorrectly.
Change-Id: I6e243d17d7cb6247f91698bc195eb0f6efeb7d17
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz
committed
on 6 Dec 2017
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2017-12-01 |
rpi3: Add documentation of Raspberry Pi 3 port
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Added design documentation and usage guide for the AArch64 port of the
Arm Trusted Firmware to the Raspberry Pi 3.
Change-Id: I1be60fbbd54c797b48a1bcebfb944d332616a0de
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz
committed
on 1 Dec 2017
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2017-09-29 |
hikey*: Update docs
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Signed-off-by: Victor Chong <victor.chong@linaro.org>
Victor Chong
committed
on 29 Sep 2017
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2017-09-01 |
docs: hikey: Fix typo
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Signed-off-by: Victor Chong <victor.chong@linaro.org>
Victor Chong
committed
on 1 Sep 2017
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2017-07-14 |
Merge pull request #1005 from ldts/v1
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Poplar: Initial commit for Poplar E-96Boards
davidcunado-arm
authored
on 14 Jul 2017
GitHub
committed
on 14 Jul 2017
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Merge pull request #1028 from vchong/bl32_optee_support_v2
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hikey: Add BL32 (OP-TEE) support v2
davidcunado-arm
authored
on 14 Jul 2017
GitHub
committed
on 14 Jul 2017
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Poplar: Initial commit for Poplar E-96Boards
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The board features the Hi3798C V200 with an integrated quad-core
64-bit ARM Cortex A53 processor and high performance Mali T720 GPU,
making it capable of running any commercial set-top solution based on
Linux or Android. Its high performance specification also supports a
premium user experience with up to H.265 HEVC decoding of 4K video at
60 frames per second.
SOC Hisilicon Hi3798CV200
CPU Quad-core ARM Cortex-A53 64 bit
DRAM DDR3/3L/4 SDRAM interface, maximum 32-bit data width 2 GB
USB Two USB 2.0 ports One USB 3.0 ports
CONSOLE USB-micro port for console support
ETHERNET 1 GBe Ethernet
PCIE One PCIe 2.0 interfaces
JTAG 8-Pin JTAG
EXPANSION INTERFACE Linaro 96Boards Low Speed Expansion slot
DIMENSION Standard 160×120 mm 96Boards Enterprice Edition form factor
WIFI 802.11AC 2*2 with Bluetooth
CONNECTORS One connector for Smart Card One connector for TSI
The platform boot sequence is as follows:
l-loader --> arm_trusted_firmware --> u-boot
Repositories:
- https://github.com/Linaro/poplar-l-loader.git
- https://github.com/Linaro/poplar-u-boot.git
U-Boot is also upstream in the project's master branch.
Make sure you are using the correct branch on each one of these
repositories. The definition of "correct" might change over time (at
this moment in time this would be the "latest" branch).
Build Line:
make CROSS_COMPILE=aarch64-linux-gnu- all fip SPD=none DEBUG=1
PLAT=poplar BL33=/path/to/u-boot.bin
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Signed-off-by: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Alex Elder <elder@linaro.org>
Tested-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Tested-by: Leo Yan <leo.yan@linaro.org>
Tested-by: Alex Elder <elder@linaro.org>
Jorge Ramirez-Ortiz
committed
on 14 Jul 2017
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2017-07-12 |
hikey960: Add BL32 (OP-TEE) support
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Signed-off-by: Victor Chong <victor.chong@linaro.org>
Acked-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Victor Chong
committed
on 12 Jul 2017
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hikey: Add BL32 (OP-TEE) support
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Signed-off-by: Victor Chong <victor.chong@linaro.org>
Victor Chong
committed
on 12 Jul 2017
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hikey: Fix errors in doc
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Signed-off-by: Victor Chong <victor.chong@linaro.org>
Victor Chong
committed
on 12 Jul 2017
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2017-07-11 |
hikey960: Fix errors in doc
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Signed-off-by: Victor Chong <victor.chong@linaro.org>
Acked-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Victor Chong
committed
on 11 Jul 2017
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2017-06-29 |
Remove Markdown documentation
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Removed Markdown documents as they have been converted to
reStructuredText.
Change-Id: I3148222eb31258f158f64de4ddcdda4b232ce483
Signed-off-by: Douglas Raillard <douglas.raillard@arm.com>
Douglas Raillard
committed
on 29 Jun 2017
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Convert documentation to reStructuredText
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Due to recent issues in the rendering of the documentation on GitHub and
some long-standing issues like the lack of automatic table of content in
Markdown, the documentation has been converted to reStructuredText.
Basic constructs looks pretty similar to Markdown.
Automatically convert GitHub markdown documentation to reStructuredText
using pandoc.
Change-Id: If20b695acedc6d1b49c8d9fb64efd6b6ba23f4a9
Signed-off-by: Douglas Raillard <douglas.raillard@arm.com>
Douglas Raillard
committed
on 29 Jun 2017
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Fix various small issues in the documentation
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Change some hard-to-convert constructs to cleaner ones.
Fix a broken link.
Change-Id: Ida70aa1da0af7a107b0e05eb20b8d46669a0380b
Signed-off-by: Douglas Raillard <douglas.raillard@arm.com>
Douglas Raillard
committed
on 29 Jun 2017
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2017-06-12 |
uniphier: add TSP support
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Add TSP to test BL32 without relying on external projects.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada
committed
on 12 Jun 2017
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uniphier: support Socionext UniPhier platform
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Initial commit for Socionext UniPhier SoC support. BL1, Bl2, and
BL31 are supported. Refer to docs/plat/socionext-uniphier.md for
more detais.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada
committed
on 12 Jun 2017
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2017-06-07 |
hikey960: add document
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Add document on HiKey960 platform and how to build.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Haojian Zhuang
committed
on 7 Jun 2017
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2017-05-24 |
hikey: add hikey support
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Add the description on hikey and how to build.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Haojian Zhuang
authored
on 23 May 2017
Dan Handley
committed
on 24 May 2017
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2017-02-28 |
Tegra: enable ECC/Parity protection for Cortex-A57 CPUs
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This patch enables L2 ECC and Parity Protection for ARM Cortex-A57 CPUs
for Tegra SoCs.
Change-Id: I038fcd529991d0201a4951ce2730ab71b1c980f9
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Varun Wadekar
committed
on 28 Feb 2017
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2017-02-22 |
Tegra: init normal/crash console for platforms
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The BL2 fills in the UART controller ID to be used as the normal as
well as the crash console on Tegra platforms. The controller ID to
UART controller base address mapping is handled by each Tegra SoC
the base addresses might change across Tegra chips.
This patch adds the handler to parse the platform params to get the
UART ID for the per-soc handlers.
Change-Id: I4d167b20a59aaf52a31e2a8edf94d8d6f89598fa
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Varun Wadekar
committed
on 22 Feb 2017
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Tegra: add tzdram_base to plat_params_from_bl2 struct
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This patch adds another member, tzdram_base, to the plat_params_from_bl2 struct
in order to store the TZDRAM carveout base address used to load the Trusted OS.
The monitor programs the memory controller with the TZDRAM base and size in order
to deny any accesses from the NS world.
Change-Id: If39b8674d548175d7ccb6525c18d196ae8a8506c
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Varun Wadekar
committed
on 22 Feb 2017
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2017-02-06 |
zynqmp: remove RESET_TO_BL31=1 from build instruction
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RESET_TO_BL31=1 is specified by plat/xilinx/zynqmp/platform.mk with
"override" directive. So, RESET_TO_BL31=1 is guaranteed without any
operation on users' side.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada
committed
on 6 Feb 2017
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2016-07-04 |
Merge pull request #651 from Xilinx/zynqmp_uart
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zynqmp: Make UART selectable
danh-arm
authored
on 4 Jul 2016
GitHub
committed
on 4 Jul 2016
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