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History for arm-trusted-firmware / plat / intel / soc / stratix10 / bl31_plat_setup.c

2019-08-07	5119fa7 Browse files » Merge changes from topic "intel-plat-refactor" into integration ... * changes: intel: Platform common code refactor intel: Platform common code refactor Sandrine Bailleux authored on 7 Aug 2019 TrustedFirmware Code Review committed on 7 Aug 2019
2019-08-07	3f7b149 Browse files » intel: Platform common code refactor ... Pull out common code from aarch64 and include Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com> Change-Id: I4d0f5e1bb01bcdacbedf8e6c359de594239b645f Hadi Asyrafi authored on 1 Aug 2019 Sandrine Bailleux committed on 7 Aug 2019
2019-08-02	600db4e Browse files » intel: stratix10: Fix BL31 memory mapping ... Previous config blocks ATF runtime service communications with SDM mailbox Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com> Change-Id: Ia857facd0bd0790056df94ed1e016bcf619a161e Hadi Asyrafi committed on 2 Aug 2019
2019-02-25	1cf55ab Browse files » plat: intel: Add BL31 support to Intel Stratix10 SoCFPGA platform ... This adds BL31 support to Intel Stratix10 SoCFPGA platform. BL31 in TF-A supports: - PSCI calls to enable 4 CPU cores - PSCI mailbox calls for FPGA reconfiguration Signed-off-by: Loh Tien Hock <tien.hock.loh@intel.com> Tien Hock, Loh committed on 25 Feb 2019