LuminaSensum/arm-trusted-firmware

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LuminaSensum / arm-trusted-firmware

History for arm-trusted-firmware / plat

2018-07-24	964dfee Browse files » stm32mp1: Add BL32 SP_min secure monitor ... Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Mathieu Belou <mathieu.belou@st.com> Signed-off-by: Lionel Debieve <lionel.debieve@st.com> Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com> Yann Gautier committed on 24 Jul 2018
	10a511c Browse files » stm32mp1: Add DDR support and its security with TZC400 ... The DDR driver is under dual license, BSD and GPLv2. The configuration parameters are taken from device tree. Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com> Signed-off-by: Lionel Debieve <lionel.debieve@st.com> Yann Gautier committed on 24 Jul 2018
	e4f559f Browse files » stm32mp1: Add PMIC support ... If a PMIC companion chip is present on board, it has to be configured for regulators supplies. This check is done with board DT configuration. Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Pascal Paillet <p.paillet@st.com> Yann Gautier committed on 24 Jul 2018
	278c34d Browse files » stm32mp1: Add console support ... Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com> Signed-off-by: Lionel Debieve <lionel.debieve@st.com> Yann Gautier committed on 24 Jul 2018
	e58a53f Browse files » stm32mp1: save boot information in backup registers ... This will be used by BL33 to get boot device and instance. Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Mathieu Belou <mathieu.belou@st.com> Signed-off-by: Lionel Debieve <lionel.debieve@st.com> Yann Gautier committed on 24 Jul 2018
	6a339a4 Browse files » stm32mp1: Add GPIO support ... The management of pinctrl nodes of device tree is also added. Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Mathieu Belou <mathieu.belou@st.com> Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com> Yann Gautier committed on 24 Jul 2018
	7839a05 Browse files » stm32mp1: Add clock and reset support ... The clock driver is under dual license, BSD and GPLv2. The clock driver uses device tree, so a minimal support for this is added. The required files for driver and DTS files are in include/dt-bindings/. Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com> Signed-off-by: Lionel Debieve <lionel.debieve@st.com> Yann Gautier committed on 24 Jul 2018
	4353bb2 Browse files » Introduce STMicroelectronics STM32MP1 platform ... STM32MP1 is a microprocessor designed by STMicroelectronics, based on a dual Arm Cortex-A7. It is an Armv7-A platform, using dedicated code from TF-A. STM32MP1 uses BL2 compiled with BL2_AT_EL3. Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Mathieu Belou <mathieu.belou@st.com> Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Signed-off-by: Lionel Debieve <lionel.debieve@st.com> Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Pascal Paillet <p.paillet@st.com> Yann Gautier committed on 24 Jul 2018
	Unverified cffb003 Browse files » Merge pull request #1488 from b49020/integration ... synquacer: Enable optional OP-TEE support danh-arm authored on 24 Jul 2018 GitHub committed on 24 Jul 2018
	Unverified 790e6c5 Browse files » Merge pull request #1485 from jeenu-arm/ras ... Double-fault and fatal error handling support danh-arm authored on 24 Jul 2018 GitHub committed on 24 Jul 2018
	6cb2a39 Browse files » synquacer: Enable optional OP-TEE support ... OP-TEE loading is optional on Developerbox controlled via SCP firmware. To check if OP-TEE is loaded or not, we use DRAM1 region info passed by SCP firmware. Signed-off-by: Sumit Garg <sumit.garg@linaro.org> Reviewed-by: Daniel Thompson <daniel.thompson@linaro.org> Sumit Garg committed on 24 Jul 2018
2018-07-21	99eb5ae Browse files » hikey: include TBB in BL1 ... BL1 is used in recovery mode on HiKey. The TBB implementation on HiKey is in BL2. It means that user need to build ATF BL2 with TBB and ATF BL1 with non-TBB. It's inconvenient. So include TBB in BL1, too. Signed-off-by: Teddy Reed <teddy@prosauce.org> Signed-off-by: Victor Chong <victor.chong@linaro.org> Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Haojian Zhuang committed on 21 Jul 2018
2018-07-19	Unverified ba0248b Browse files » Merge pull request #1450 from MISL-EBU-System-SW/marvell-support-v6 ... Marvell support for Armada 8K SoC family danh-arm authored on 19 Jul 2018 GitHub committed on 19 Jul 2018
	Unverified 992a353 Browse files » Merge pull request #1483 from antonio-nino-diaz-arm/an/rpi3-psci ... rpi3: PSCI and Linux boot improvements danh-arm authored on 19 Jul 2018 GitHub committed on 19 Jul 2018
	Unverified e4686fd Browse files » Merge pull request #1449 from theopolis/hikey-tbb ... hikey: Add experimental TBB support danh-arm authored on 19 Jul 2018 GitHub committed on 19 Jul 2018
	Unverified 8ff0dfa Browse files » Merge pull request #1482 from sandrine-bailleux-arm/sb/fix-hcptr ... Misc arch.h fixes and cleanup danh-arm authored on 19 Jul 2018 GitHub committed on 19 Jul 2018
	eaeaa4d Browse files » RAS: Introduce handler for EL3 EAs ... External Aborts while executing in EL3 is fatal in nature. This patch allows for the platform to define a handler for External Aborts received while executing in EL3. A default implementation is added which falls back to platform unhandled exception. Change-Id: I466f2c8113a33870f2c7d2d8f2bf20437d9fd354 Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com> Jeenu Viswambharan committed on 19 Jul 2018
	d5a23af Browse files » RAS: Introduce handler for Double Faults ... Double fault is when the PE receives another error whilst one is being handled. To detect double fault condition, a per-CPU flag is introduced to track the status of error handling. The flag is checked/modified while temporarily masking external aborts on the PE. This patch routes double faults to a separate platform-defined handler. Change-Id: I70e9b7ba4c817273c55a0af978d9755ff32cc702 Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com> Jeenu Viswambharan committed on 19 Jul 2018
	b56dc2a Browse files » RAS: Introduce handler for Uncontainable errors ... Uncontainable errors are the most severe form of errors, which typically mean that the system state can't be trusted any more. This further means that normal error recovery process can't be followed, and an orderly shutdown of the system is often desirable. This patch allows for the platform to define a handler for Uncontainable errors received. Due to the nature of Uncontainable error, the handler is expected to initiate an orderly shutdown of the system, and therefore is not expected to return. A default implementation is added which falls back to platform unhandled exception. Also fix ras_arch.h header guards. Change-Id: I072e336a391a0b382e77e627eb9e40729d488b55 Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com> Jeenu Viswambharan committed on 19 Jul 2018
2018-07-18	34ec7ec Browse files » plat: marvell: Add board support for A8K platform ... Add support for A8K platform boards Change-Id: Ife025d930d2ab6cabbc13bbe19b2273cc1c938c8 Signed-off-by: Hanna Hawa <hannah@marvell.com> Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Konstantin Porotchkin committed on 18 Jul 2018
	486f868 Browse files » plat: marvell: Add common ARMADA platform components ... Add common Marvell ARMADA platform components. This patch also includes common components for Marvell ARMADA 8K platforms. Change-Id: I42192fdc6525a42e46b3ac2ad63c83db9bcbfeaf Signed-off-by: Hanna Hawa <hannah@marvell.com> Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Konstantin Porotchkin committed on 18 Jul 2018
	Unverified 2e4eea1 Browse files » Merge pull request #1471 from Anson-Huang/master ... Add i.MX8QX/i.MX8QM power management feature Soby Mathew authored on 18 Jul 2018 GitHub committed on 18 Jul 2018
	3039988 Browse files » Fix types of arch.h definitions ... Define the values as unsigned int or unsigned long long based on the actual size of the register. This prevents subtle issues caused by having a type that is too small. For example: #define OPTION_ENABLE 0x3 #define OPTION_SHIFT 32 uint64_t mask = OPTION_ENABLE << OPTION_SHIFT; Because OPTION_ENABLE fits in an int, the value is considered an int. This means that, after shifting it 32 places to the left, the final result is 0. The correct way to define the values is: #define OPTION_ENABLE ULL(0x3) #define OPTION_SHIFT U(32) In this case, the compiler is forced to use a 64 bit value from the start, so shifting it 32 places to the left results in the expected value. Change-Id: Ieaf2ffc2d8caa48c622db011f2aef549e713e019 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Antonio Nino Diaz committed on 18 Jul 2018
	Unverified 344e403 Browse files » Merge pull request #1480 from sandrine-bailleux-arm/topics/sb/debug-macros ... Always compile debug macros Soby Mathew authored on 18 Jul 2018 GitHub committed on 18 Jul 2018
2018-07-16	aa49bde Browse files » rpi3: Move NS-DRAM out of the protected region ... The Non-secure DRAM region shouldn't be protected in the range specified in the Linux command line with memmap. This change also increases the size of the Secure DRAM region. Change-Id: I306e9e443a84b834c99739f54a534a3ca3be2424 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Antonio Nino Diaz committed on 16 Jul 2018
	76c944a Browse files » rpi3: Add support for direct Linux kernel boot ... This option allows the Trusted Firmware to pass the correct arguments to a 32 or 64-bit Linux kernel without the need of an intermediate loader such as U-Boot. Change-Id: I2b22e8933fad6a614588ace559f893e97329801f Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Antonio Nino Diaz committed on 16 Jul 2018
	6d924ca Browse files » rpi3: Don't wire mailbox 3 to FIQ line ... FIQs shouldn't be used at all as long as the interrupt routing doesn't support them properly. Change-Id: Ib1db7b523a62de2035d41197bc791048337cf791 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Antonio Nino Diaz committed on 16 Jul 2018
	6297d6f Browse files » rpi3: Fix warm entrypoint setup for PSCI_CPU_ON ... Remove unused variable and set the secure entrypoint correctly. Change-Id: I7447ea62771092de6be35704077ae28c519d6993 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Antonio Nino Diaz committed on 16 Jul 2018
	1aad932 Browse files » rpi3: Add support for the stack protector ... It uses the hardware RNG in a similar way as Juno (it gets 128 bits of entropy and does xor on them). It is disabled by default. Change-Id: I8b3adb61f5a5623716e0e8b6799404c68dd94c60 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Antonio Nino Diaz committed on 16 Jul 2018
	4ad2696 Browse files » rpi3: Introduce hardware RNG driver ... Note that this is a non-secure RNG. This is only useful for educational purposes. Change-Id: If359c8d0f755ef8e416986de7fbca34679a523e1 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Antonio Nino Diaz committed on 16 Jul 2018