Tegra: fiq_glue: support to handle LEGACY_FIQ PPIs for Tegra SoCs ...

This patch adds support to handle secure PPIs for Tegra watchdog timers. This
functionality is currently protected by the ENABLE_WDT_LEGACY_FIQ_HANDLING
configuration variable and is only enabled for Tegra210 platforms, for now.

Change-Id: I0752ef54a986c58305e1bc8ad9be71d4a8bbd394
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

Tegra: flowctrl: support to enable/disable WDT's legacy FIQ routing ...

On earlier Tegra platforms, e.g. Tegra210, the watchdog timer's FIQ interrupt
is not direclty wired to the GICD. It goes to the flow controller instead, for
power state management. But the flow controller can route the FIQ to the GICD,
as a PPI, which can then get routed to the target CPU.

This patch adds routines to enable/disable routing the legacy FIQ used by
the watchdog timers, to the GICD.

Change-Id: Idd07c88c8d730b5f0e93e3a6e4fdc59bdcb2161b
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

Tegra: SiP: set GPU in reset after vpr resize ...

Whenever the VPR memory is resized, the GPU is put into reset first
and then the new VPR parameters are programmed to the memory controller
block. There exists a scenario, where the GPU might be out before we
program the new VPR parameters. This means, the GPU would still be
using older settings and leak secrets.

This patch puts the GPU back into reset, if it is out of reset after
resizing VPR, to mitigate this hole.

Change-Id: I38a1000e3803f80909efcb02e27da4bd46909931
Signed-off-by: Jeetesh Burman <jburman@nvidia.com>

Tegra: handle FIQ interrupts when NS handler is not registered ...

This patch updates the secure interrupt handler to mark the interrupt
as complete in case the NS world has not registered a handler.

Change-Id: Iebe952305f7db46375303699b6150611439475df
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

Tegra: bpmp_ipc: support to enable/disable module clocks ...

This patch adds support to the bpmp_ipc driver to allow clients to
enable/disable clocks to hardware blocks. Currently, the API only
supports SE devices.

Change-Id: I9a361e380c0bcda59f5a92ca51c86a46555b2e90
Signed-off-by: steven kao <skao@nvidia.com>

Tegra: fix offset used to dump GICD registers from crash handler ...

The GICD registers are 32-bits wide whereas the crash handler was reading
them as 64-bit ones. This patch fixes the code to read the GICD registers,
32-bits at a time, from the paltform's crash handler.

Change-Id: If3d6608529684ecc02be6a1b715012310813b2a4
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

Tegra: default platform handler for the CPU_STANDBY state ...

This patch adds a default implementation for the platform specific
CPU standby power handler. Tegra SoCs can override this handler
with their own implementations.

Change-Id: I91e513842f194b1e2b1defa2d833bb4d9df5f06b
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

Tegra186: smmu: add support for backup multiple smmu regs ...

Modifying smmu macros to pass base address of smmu so that it can be
used with multiple smmus.

Added macro for combining smmu backup regs that can be used for multiple
smmus.

Change-Id: I4f3bb83d66d5df14a3b91bc82f7fc26ec8e4592e
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>

Merge pull request #1745 from svenauhagen/bugfix/a8k ...

Armada8k GPIO Register macro fix

Merge pull request #1793 from marex/arm/master/fixes-v2.0.0 ...

Arm/master/fixes v2.0.0

Merge pull request #1791 from antonio-nino-diaz-arm/an/rk-gic ...

rockchip: Fix GICv2 interrupts

Merge pull request #1789 from Anson-Huang/lpm ...

Add power optimization for i.MX8QM/i.MX8QX

Merge pull request #1788 from laroche/rpi3_duplicate_initialization ...

rpi3: Remove duplicate initialization for BL32_IMAGE_ID and mark one more function as static.

rcar_gen3: plat: Add missing cpu_on_check() implementation ...

The ATF code fails to build with PMIC_ROHM_BD9571=0, add the missing
function into the PWRC code.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>

rcar_gen3: plat: Allow E3 auto-detection ...

Allow auto-detecting E3 when RCAR_LSI is set to RCAR_AUTO.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>

rcar_gen3: plat: Drop unused macro ...

The macro is not used, drop it.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>

Revert "rcar_gen3: plat: Enable programmable CPU reset address" ...

This reverts commit d48536e,
which misbehaves on R-Car H3 ES2.0. Until the reason for that
misbehavior is understood, revert the commit.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>

imx: power optimization for i.mx8qx ...

Current implementation of i.MX8QX power management related
features does NOT optimize power number, all system resources
like CCI, DDR, and A cluster etc. are kept in STBY mode (powered
ON) when system suspend or CPU hotplug.

To lower the power number, OFF mode should be adopted for those
system resources whenever they can be OFF, A cluster will be OFF
if the CPUs in the cluster are all off line, DDR/MU/DB can be OFF
if system suspend, IRQ steer can be OFF if the wakeup source is
belonged to system controller partition, so wakeup source runtime
check is used to determine if IRQ steer can be OFF before system
suspend.

If resources are powered off for suspend, they should be restored
properly after system resume.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>

imx: power optimization for i.mx8qm ...

Current implementation of i.MX8QM power management related
features does NOT optimize power number, all system resources
like CCI, DDR, and A cluster etc. are kept in STBY mode (powered
ON) when system suspend or CPU hotplug.

To lower the power number, OFF mode should be adopted for those
system resources whenever they can be OFF, A cluster will be OFF
if the CPUs in the cluster are all off line, DDR/MU/DB can be OFF
if system suspend, IRQ steer can be OFF if the wakeup source is
belonged to system controller partition, so wakeup source runtime
check is used to determine if IRQ steer can be OFF before system
suspend.

If resources are powered off for suspend, they should be restored
properly after system resume.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>

rpi3: mark one more function as static ...

Signed-off-by: Florian La Roche <Florian.LaRoche@gmail.com>

rpi3: remove duplicate initialization for BL32_IMAGE_ID ...

Signed-off-by: Florian La Roche <Florian.LaRoche@gmail.com>

rockchip: Fix GICv2 interrupts ...

After the removal of deprecated interfaces in TF 2.0 the migration to
the new GIC driver interfaces was done incorrectly in rk3328 and rk3368:
2d6f1f01b141 ("rockchip: Migrate to new interfaces").

In the GICv2 driver it is mandated that all interrupts are Group 0
interrupts. This patch simply moves all Group 1 interrupts to Group 0.

Change-Id: I224c0135603eb5b81bd512976361500c0d129a91
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

Merge pull request #1773 from grandpaul/rpi3-gpio-driver ...

Rpi3 gpio driver

rpi3: Enable GPIO in BL2 ...

This patch inits the GPIO in BL2 earlysetup. So BL2 can start operating
GPIO pins.

Signed-off-by: Ying-Chun Liu (PaulLiu) <paulliu@debian.org>

fvp: pwrc: Move to drivers/ folder ...

Change-Id: I670ea80e0331c2d4b2ccfa563a45469a43f6902d
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

plat/arm: sds: Move to drivers/ folder ...

Change-Id: Ia601d5ad65ab199e747fb60af4979b7db477d249
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

plat/arm: scp: Move to drivers/ folder ...

Change-Id: Ida5dae39478654405d0ee31a6cbddb4579e76a7f
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

plat/arm: scpi: Move to drivers/ folder ...

Change-Id: Icc59cdaf2b56f6936e9847f1894594c671db2e94
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

plat/arm: mhu: Move to drivers/ folder ...

Change-Id: I656753a1825ea7340a3708b950fa6b57455e9056
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

plat/arm: scmi: Move to drivers/ folder ...

Change-Id: I8989d2aa0258bf3b50a856c5b81532d578600124
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>