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2019-05-23	292bc55 Browse files » drivers: scmi: scmi_sq: Modify wrong payload length ... Payload length of the get dram mapping information message is 0. The mbx_mem->len parameter should be 4, it only contains message header. Fixes: b67d202 ("plat/synquacer: enable SCMI support") Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org> Change-Id: If1cd4c855da2dc5dc4b6da3bea152b8441971de7 Masahisa Kojima committed on 23 May 2019
2019-05-21	197822e Browse files » rcar_gen3: drivers: qos: update QoS setting ... Update M3 Ver.3.0 QoS setting rev.0.03. Change-Id: I892521d456c606ac3d30f2b2ac6b4e16faa5fc48 Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Yoshifumi Hosoya authored on 12 Apr 2019 Marek Vasut committed on 21 May 2019
2019-05-15	519a7db Browse files » Merge "drivers: ufs: Extend the delay after reset to wait for some slower chips" into integration Soby Mathew authored on 15 May 2019 TrustedFirmware Code Review committed on 15 May 2019
2019-05-13	cbebadf Browse files » drivers: ufs: Extend the delay after reset to wait for some slower chips ... We've seen issues with some THG based UFS chips, where after reset the LUNs don't always enumerate properly. After some debugging, we found that extending the mdelay here seems to resolve the issue by giving the chips enough time to complete reset. Change-Id: I848f810b2438ed6ad3d33db614c61d2cef9ac400 Signed-off-by: John Stultz <john.stultz@linaro.org> John Stultz committed on 13 May 2019
2019-05-10	1461ad9 Browse files » SMMUv3: Abort DMA transactions ... For security DMA should be blocked at the SMMU by default unless explicitly enabled for a device. SMMU is disabled after reset with all streams bypassing the SMMU, and abortion of all incoming transactions implements a default deny policy on reset. This patch also moves "bl1_platform_setup()" function from arm_bl1_setup.c to FVP platforms' fvp_bl1_setup.c and fvp_ve_bl1_setup.c files. Change-Id: Ie0ffedc10219b1b884eb8af625bd4b6753749b1a Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com> Alexei Fedorov committed on 10 May 2019
2019-05-03	ccd4d47 Browse files » SMMUv3: refactor the driver code ... This patch is a preparation for the subsequent changes in SMMUv3 driver. It introduces a new "smmuv3_poll" function and replaces inline functions for accessing SMMU registers with mmio read/write operations. Also the infinite loop for the poll has been replaced with a counter based timeout. Change-Id: I7a0547beb1509601f253e126b1a7a6ab3b0307e7 Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com> Alexei Fedorov authored on 26 Apr 2019 Soby Mathew committed on 3 May 2019
2019-04-25	6f78eb5 Browse files » drivers: ti: uart: add a aarch32 variant ... Rockchip re-uses the ti uart console driver and for aarch32 needs a specific variant, so add it. There are also aarch32 ti socs, so it may be useful for them as well at some point. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Change-Id: I31ede7cc7b10347b3691cff051db2b985fd59e17 Heiko Stuebner committed on 25 Apr 2019
2019-04-24	71892ca Browse files » Console: Allow to register multiple times ... It removes the need to unregister the console on system suspend. Change-Id: Ic9311a242a4a9a778651f7e6380bd2fc0964b2ce Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com> Ambroise Vincent committed on 24 Apr 2019
2019-04-17	f79abf5 Browse files » drivers/sbsa: add sbsa watchdog driver ... Add a driver for configuring the SBSA Generic Watchdog which aids in the detection of errant system behaviour. Change-Id: I5a1e7149c69fd8b85be7dfbcf511f431339946f4 Signed-off-by: Aditya Angadi <aditya.angadi@arm.com> Aditya Angadi committed on 17 Apr 2019
2019-04-12	72db70c Browse files » Merge changes from topic "av/tls-heap" into integration ... * changes: Mbed TLS: Remove weak heap implementation sgm: Fix bl2 sources Antonio Niño Díaz authored on 12 Apr 2019 TrustedFirmware Code Review committed on 12 Apr 2019
2019-04-12	2374ab1 Browse files » Mbed TLS: Remove weak heap implementation ... The implementation of the heap function plat_get_mbedtls_heap() becomes mandatory for platforms supporting TRUSTED_BOARD_BOOT. The shared Mbed TLS heap default weak function implementation is converted to a helper function get_mbedtls_heap_helper() which can be used by the platforms for their own function implementation. Change-Id: Ic8f2994e25e3d9fcd371a21ac459fdcafe07433e Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com> Ambroise Vincent committed on 12 Apr 2019
2019-04-11	7704ff9 Browse files » rcar_gen3: drivers: Change to restore timer counter value at resume ... Changed to save and restore cntpct_el0 using memory mapped register for generic timer when System Suspend and Resume. Reported by: Volodymyr Babchuk <volodymyr_babchuk@epam.com> Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com> Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com> Change-Id: I40fd9f5434c4d52b320cd1d20322b9b8e4e67155 Toshiyuki Ogasahara authored on 22 Mar 2019 Marek Vasut committed on 11 Apr 2019
	4983f8b Browse files » rcar_gen3: drivers: pwrc: Add DBSC4 setting before self-refresh mode ... Very rarely, LPDDR4 power consumption may not decrease In self-refresh mode. This patch fixes the DBSC4 self-refresh mode sequence. Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com> Signed-off-by: Kenji Miyazawa <kenji.miyazawa.xt@renesas.com> Signed-off-by: Chiaki Fujii <chiaki.fujii.wj@renesas.com> Change-Id: I838fa0892b1caf1ecd3f04538b3427e7d971ef59 Yoshifumi Hosoya authored on 15 Mar 2019 Marek Vasut committed on 11 Apr 2019
	4988c4c Browse files » rcar_gen3: drivers: ddr: Update DDR setting rev.0.35 ... [IPL/DDR] - Update DDR setting rev.0.35. Signed-off-by: Chiaki Fujii <chiaki.fujii.wj@renesas.com> Change-Id: I2b936ca8621ca320cc97353f99240da5f24781f7 Chiaki Fujii authored on 1 Mar 2019 Marek Vasut committed on 11 Apr 2019
	d8e666a Browse files » rcar_gen3: drivers: qos: change subslot cycle ... Subslot cycle from 132 to 126 as default setting. Subslot cycle from 264 to 252. [IPL/QoS] - Update H3 Ver.2.0 QoS setting rev.0.21. - Update H3 Ver.3.0 QoS setting rev.0.11. - Update M3 Ver.1.1 QoS setting rev.0.19. - Update M3 Ver.3.0 QoS setting rev.0.02. - Update M3N Ver.1.1 QoS setting rev.0.09. Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com> Change-Id: I52b1bf880163ce03065dc8933d7f193e45cfd9a5 Yoshifumi Hosoya authored on 11 Mar 2019 Marek Vasut committed on 11 Apr 2019
	8c71558 Browse files » rcar_gen3: drivers: board: Add new board revision for H3ULCB ... Board Revision[2:0] 3'b000 Rev1.0 OB 3'b001 Rev1.0 CE 3'b010 Rev2.0 [New] Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com> Change-Id: I0f109cddc95eca78aea34c7149e70f14e2f1620b Yusuke Goda authored on 11 Mar 2019 Marek Vasut committed on 11 Apr 2019
2019-04-09	7a246d6 Browse files » Checkpatch: Style fix ... Change-Id: I0cb9f0db1ef3491f55c038a10db5a88d37e89697 Signed-off-by: Joel Hutton <Joel.Hutton@Arm.com> Joel Hutton committed on 9 Apr 2019
2019-04-08	3007042 Browse files » cot-desc: optimise memory further ... This changes the auth_img_desc_t struct to have pointers to struct arrays instead of struct arrays. This saves memory as many of these were never used, and can be NULL pointers. Note the memory savings are only when these arrays are not initialised, as it is assumed these arrays are fixed length. A possible future optimisation could allow for variable length. memory diff: bl1: bl2: text text -12 -12 bss bss -1463 0 data data -56 -48 rodata rodata -5688 -2592 total total -7419 -2652 Change-Id: I8f9bdedf75048b8867f40c56381e3a6dc6402bcc Signed-off-by: Joel Hutton <Joel.Hutton@Arm.com> Joel Hutton committed on 8 Apr 2019
2019-04-08	0b6377d Browse files » Reduce memory needed for CoT description ... When Trusted Board Boot is enabled, we need to specify the Chain of Trust (CoT) of the BL1 and BL2 images. A CoT consists of an array of image descriptors. The authentication module assumes that each image descriptor in this array is indexed by its unique image identifier. For example, the Trusted Boot Firmware Certificate has to be at index [TRUSTED_BOOT_FW_CERT_ID]. Unique image identifiers may not necessarily be consecutive. Also, a given BL image might not use all image descriptors. For example, BL1 does not need any of the descriptors related to BL31. As a result, the CoT array might contain holes, which unnecessarily takes up space in the BL binary. Using pointers to auth_img_desc_t structs (rather than structs themselves) means these unused elements only use 1 pointer worth of space, rather than one struct worth of space. This patch also changes the code which accesses this array to reflect the change to pointers. Image descriptors not needed in BL1 or BL2 respectively are also ifdef'd out in this patch. For example, verifying the BL31 image is the responsibility of BL2 so BL1 does not need any of the data structures describing BL31. memory diff: bl1: bl2: text text -20 -20 bss bss -1463 0 data data -256 -48 rodata rodata -5240 -1952 total total -6979 -2020 Change-Id: I163668b174dc2b9bbb183acec817f2126864aaad Signed-off-by: Joel Hutton <Joel.Hutton@Arm.com> Joel Hutton committed on 8 Apr 2019
2019-04-03	6e756f6 Browse files » Makefile: remove extra include paths in INCLUDES ... Now it is needed to use the full path of the common header files. Commit 09d40e0e0828 ("Sanitise includes across codebase") provides more information. Change-Id: Ifedc79d9f664d208ba565f5736612a3edd94c647 Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com> Ambroise Vincent committed on 3 Apr 2019
	cc69cfd Browse files » tzc: remove deprecated types ... Types tzc_action_t and tzc_region_attributes_t are deprecated. Change-Id: Ieefeb8521a0e1130f39d09b5c0d2728f05084773 Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com> Ambroise Vincent committed on 3 Apr 2019
	be3991c Browse files » Console: remove deprecated finish_console_register ... The old version of the macro is deprecated. Commit cc5859ca19ff ("Multi-console: Deprecate the `finish_console_register` macro") provides more details. Change-Id: I3d1cdf6496db7d8e6cfbb5804f508ff46ae7e67e Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com> Ambroise Vincent committed on 3 Apr 2019
	Unverified 682c307 Browse files » Merge pull request #1917 from marex/arm/master/v3meagle-v2.0.1 ... rcar_gen3: plat: Add R-Car V3M support Antonio Niño Díaz authored on 3 Apr 2019 GitHub committed on 3 Apr 2019
2019-04-02	b99f922 Browse files » meson/gxl: Add support for SHA256 DMA engine ... In order to configure and boot SCP, BL31 has to compute and send the SHA-256 of the firmware data via scpi. Luckily Amlogic GXL SOC has a DMA facility that could be used to offload SHA-256 computations. This adds basic support of this hardware SHA-256 engine. Signed-off-by: Remi Pommarel <repk@triplefau.lt> Remi Pommarel committed on 2 Apr 2019
2019-04-02	b709fe9 Browse files » rcar_gen3: plat: Add R-Car V3M support ... Add R-Car V3M support. This is based on the original V3M support patch for Yocto v2.23.1 by Vladimir Barinov. Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> --- Marek: Update on top of mainline ATF/master Valentine Barshak authored on 29 Oct 2018 Marek Vasut committed on 2 Apr 2019
2019-04-01	15652ec Browse files » rcar_gen3: drivers: qos: Add D3 QoS tables ... Add QoS tables for R-Car D3 SoC. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Marek Vasut committed on 1 Apr 2019
	b645d22 Browse files » rcar_gen3: drivers: pfc: Add D3 PFC tables ... Add PFC tables for R-Car D3 SoC. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Marek Vasut committed on 1 Apr 2019
	b60b9b5 Browse files » rcar_gen3: drivers: ddr_a: Add D3 DDR init ... Add R-Car D3 DDR initialization code. The code is in staging and needs cleanup, and possibly can even be merged with the E3 init code. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Marek Vasut committed on 1 Apr 2019
	cdea546 Browse files » rcar_gen3: drivers: swdt: Add D3 support ... Add WTCNT register configuration for the D3 SoC. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Marek Vasut committed on 1 Apr 2019
	ada6613 Browse files » rcar_gen3: drivers: scif: Add D3 support ... Add SCIF configuration specifics for the D3 SoC, that is detection of the D3 SoC and SCBRR configuration. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Marek Vasut committed on 1 Apr 2019