Merge pull request #1676 from Yann-lms/static_analysis ...

Correct some issues found with static analysis tools

cadence: uart: comply to console_register prototype ...

Signed-off-by: Alexei Colin <acolin@isi.edu>

stm32mp1: remove duplicate function declaration ...

It is already in include/drivers/st/stm32mp1_ddr_helpers.h.

Signed-off-by: Yann Gautier <yann.gautier@st.com>

stm32mp1: correct some static analysis tools issues ...

These issues wer found by sparse:

drivers/st/clk/stm32mp1_clk.c:1524:19:
 warning: incorrect type in assignment (different base types)
    expected restricted fdt32_t const [usertype] *pkcs_cell
    got unsigned int const [usertype] *

plat/st/stm32mp1/plat_image_load.c:13:6:
 warning: symbol 'plat_flush_next_bl_params' was not declared.
 Should it be static?
plat/st/stm32mp1/plat_image_load.c:21:16:
 warning: symbol 'plat_get_bl_image_load_info' was not declared.
 Should it be static?
plat/st/stm32mp1/plat_image_load.c:29:13:
 warning: symbol 'plat_get_next_bl_params' was not declared.
 Should it be static?

plat/st/stm32mp1/bl2_io_storage.c:40:10:
 warning: symbol 'block_buffer' was not declared. Should it be static?

Signed-off-by: Yann Gautier <yann.gautier@st.com>

psci: put __dead2 attribute after void in plat_psci_ops ...

These warnings were issued by sparse:
plat/st/stm32mp1/stm32mp1_pm.c:365:36:
 warning: incorrect type in initializer (different modifiers)
    expected void ( *[noreturn] pwr_domain_pwr_down_wfi )( ... )
    got void ( [noreturn] *<noident> )( ... )
plat/st/stm32mp1/stm32mp1_pm.c:366:23:
 warning: incorrect type in initializer (different modifiers)
    expected void ( *[noreturn] system_off )( ... )
    got void ( [noreturn] *<noident> )( ... )
plat/st/stm32mp1/stm32mp1_pm.c:367:25:
 warning: incorrect type in initializer (different modifiers)
    expected void ( *[noreturn] system_reset )( ... )
    got void ( [noreturn] *<noident> )( ... )

This cannot be changed the other way in all platforms pm drivers
or else there is a compilation error:
plat/st/stm32mp1/stm32mp1_pm.c:234:1: error: attributes should be specified
 before the declarator in a function definition

Signed-off-by: Yann Gautier <yann.gautier@st.com>

Standardise header guards across codebase ...

All identifiers, regardless of use, that start with two underscores are
reserved. This means they can't be used in header guards.

The style that this project is now to use the full name of the file in
capital letters followed by 'H'. For example, for a file called
"uart_example.h", the header guard is UART_EXAMPLE_H.

The exceptions are files that are imported from other projects:

- CryptoCell driver
- dt-bindings folders
- zlib headers

Change-Id: I50561bf6c88b491ec440d0c8385c74650f3c106e
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

Arm platforms: Fix DRAM address macros ...

On AArch32, ARM_DRAM1_BASE and ARM_DRAM1_SIZE constants are currently
32-bit values (because they are suffixed with UL and the value
0x80000000 fits in a unsigned long int, i.e. a 32-bit value). When
summing them up, the result overflows the maximum value that can be
encoded in a 32-bit value so it wraps around and does not result in
the expected value.

This patch changes the suffix of these constants into ULL so that they
always are 64-bit values.

Change-Id: I3b19b1805e35cc7e43050458df379081b1e882d5
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>

Introduce fdtw_read_array() helper ...

fdtw_read_cells() can only read one or two cells, sometimes it may be
needed to read more cells from one property.

Change-Id: Ie70dc76d1540cd6a04787cde7cccb4d1bafc7282
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

Introduce new fdt helper to read string properties ...

Introduced fdtw_read_string() to read string properties.

Change-Id: I854eef0390632cf2eaddd2dce60cdb98c117de43
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

libc: Adapt strlcpy to this codebase ...

Change-Id: I2f5f64aaf90caae936510e1179392a8835f493e0
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

bakery: Fix MISRA defects ...

Change-Id: I600bc13522ae977db355b6dc5a1695bce39ec130
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

plat/arm: Fix MISRA defects in dyn config ...

Change-Id: Iae6758ca6395560131d1e1a69a1ecfe50ca8bf83
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

plat/arm: Fix types of constants in headers ...

Change-Id: I33eaee8e7c983b3042635a448cb8d689ea4e3a12
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

context_mgmt: Fix MISRA defects ...

The macro EL_IMPLEMENTED() has been deprecated in favour of the new
function el_implemented().

Change-Id: Ic9b1b81480b5e019b50a050e8c1a199991bf0ca9
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

Merge pull request #1657 from antonio-nino-diaz-arm/an/libfdt ...

libfdt: Downgrade to version 1.4.6-9

Merge pull request #1623 from MISL-EBU-System-SW/a3700-support ...

Add support for Armada 3700 and COMPHY porting layer

plat: marvell: Add support for Armada-37xx SoC platform ...

Add supprot for Marvell platforms based on Armada-37xx SoC.
This includes support for the official Armada-3720 modular
development board and EspressoBin community board.
The Armada-37xx SoC contains dual Cortex-A53 Application CPU,
single secure CPU (Cortex-M3) and the following interfaces:
- SATA 3.0
- USB 3.0 and USB 2.0
- PCIe
- SDIO (supports boot from eMMC)
- SPI
- UART
- I2c
- Gigabit Ethernet

Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>

Merge pull request #1650 from chandnich/sgiclark-ares-support ...

Sgiclark ares support

Merge pull request #1646 from Andre-ARM/allwinner/pmic-v2 ...

Allwinner/pmic v2

libfdt: Downgrade to version 1.4.6-9 ...

Version 1.4.7 introduces a big performance hit to functions that access
the FDT. Downgrade the library to version 1.4.6-9, before the changes
that introduce the problem. Version 1.4.6 isn't used because one of the
libfdt files (fdt_overlay.c) is missing the license header. This
problem is also fixed in 1.4.6-9.

This version corresponds to commit <aadd0b65c987> checks: centralize
printing of property names in failure messages.

Fixes ARM-software/tf-issues#643

Change-Id: I73c05f2b1f994bcdcc4366131ce0647553cdcfb8
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

Fix MISRA defects in PMF ...

No functional changes.

Change-Id: I64abd72026082218a40b1a4b8f7dc26ff2478ba6
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

Fix MISRA defects in workaround and errata framework ...

No functional changes.

Change-Id: Iaab0310848be587b635ce5339726e92a50f534e0
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

plat/arm: Fix MISRA defects in SiP SVC handler ...

No functional changes.

Change-Id: I9b9f8d3dfde08d57706ad5450de6ff858a55ac01
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

Fix MISRA defects in extension libs ...

No functional changes.

Change-Id: I2f28f20944f552447ac4e9e755493cd7c0ea1192
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

Merge pull request #1644 from soby-mathew/sm/pie_proto ...

Position Indepedent Executable (PIE) Support

Merge pull request #1616 from antonio-nino-diaz-arm/an/gxbb ...

Initial port of Amlogic Meson S905 (GXBB)

PIE: Position Independant Executable support for BL31 ...

This patch introduces Position Independant Executable(PIE) support
in TF-A. As a initial prototype, only BL31 can support PIE. A trivial
dynamic linker is implemented which supports fixing up Global Offset
Table(GOT) and Dynamic relocations(.rela.dyn). The fixup_gdt_reloc()
helper function implements this linker and this needs to be called
early in the boot sequence prior to invoking C functions. The GOT is
placed in the RO section of BL31 binary for improved security and the
BL31 linker script is modified to export the appropriate symbols
required for the dynamic linker.

The C compiler always generates PC relative addresses to linker symbols
and hence referencing symbols exporting constants are a problem when
relocating the binary. Hence the reference to the
`__PERCPU_TIMESTAMP_SIZE__` symbol in PMF is removed and is now calculated
at runtime based on start and end addresses.

Change-Id: I1228583ff92cf432963b7cef052e95d995cca93d
Signed-off-by: Soby Mathew <soby.mathew@arm.com>

Make errata reporting mandatory for CPU files ...

Previously the errata reporting was optional for CPU operation
files and this was achieved by making use of weak reference to
resolve to 0 if the symbol is not defined. This is error prone
when adding new CPU operation files and weak references are
problematic when fixing up dynamic relocations. Hence this patch
removes the weak reference and makes it mandatory for the CPU
operation files to define the errata reporting function.

Change-Id: I8af192e19b85b7cd8c7579e52f8f05a4294e5396
Signed-off-by: Soby Mathew <soby.mathew@arm.com>

PIE: Use PC relative adrp/adr for symbol reference ...

This patch fixes up the AArch64 assembly code to use
adrp/adr instructions instead of ldr instruction for
reference to symbols. This allows these assembly
sequences to be Position Independant. Note that the
the reference to sizes have been replaced with
calculation of size at runtime. This is because size
is a constant value and does not depend on execution
address and using PC relative instructions for loading
them makes them relative to execution address. Also
we cannot use `ldr` instruction to load size as it
generates a dynamic relocation entry which must *not*
be fixed up and it is difficult for a dynamic loader
to differentiate which entries need to be skipped.

Change-Id: I8bf4ed5c58a9703629e5498a27624500ef40a836
Signed-off-by: Soby Mathew <soby.mathew@arm.com>

Add helper to return reference to a symbol ...

This patch adds a utility function to return
the address of a symbol. By default, the compiler
generates adr/adrp instruction pair to return
the reference and this utility is used to override
this compiler generated to code and use `ldr`
instruction.

This is needed for Position Independent Executable
when it needs to reference a symbol which is constant
and does not depend on the execute address of the
binary.

For example, on the FVP, the GICv3 register context is
stored in a secure carveout (arm_el3_tzc_dram) within
DDR and does not relocate with the BL image. Now if
BL31 is executing at a different address other than
the compiled address, using adrp/adr instructions to
reference this memory will not work as they generate an
address that is PC relative. The way to get around this
problem is to reference it as non-PC relative (i.e
non-relocatable location) via `ldr` instruction.

Change-Id: I5008a951b007144258121690afb68dc8e12ee6f7
Signed-off-by: Soby Mathew <soby.mathew@arm.com>