2018-09-10 |
Merge pull request #1568 from soby-mathew/sm/fix_ares_err_report
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Fix the Cortex-ares errata reporting function name
Soby Mathew
authored
on 10 Sep 2018
GitHub
committed
on 10 Sep 2018
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Fix the Cortex-ares errata reporting function name
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This patch fixes the name of the Cortex-ares errata function which was
previously named `cortex_a72_errata_report` which was an error.
Change-Id: Ia124df4628261021baa8d9a30308bc286d45712b
Signed-off-by: Soby Mathew <soby.mathew@arm.com>
Soby Mathew
committed
on 10 Sep 2018
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2018-09-07 |
RAS: Fix assert condition
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Change-Id: Ia02a2dbfd4e25547776e78bed40a91f3452553d7
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
Jeenu Viswambharan
committed
on 7 Sep 2018
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2018-09-05 |
Add missing barriers to Bakery Locks
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With the current implementation, it's possible for a contender to
observe accesses in the Critical Section before acquiring or releasing
the lock. Insert fencing in the locking and release codes to prevent any
reorder.
Fixes ARM-software/tf-issues#609
Change-Id: I773b82aa41dd544a2d3dbacb9a4b42c9eb767bbb
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
Jeenu Viswambharan
committed
on 5 Sep 2018
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2018-09-04 |
cpus: denver: Implement static workaround for CVE-2018-3639
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For Denver CPUs, this approach enables the mitigation during EL3
initialization, following every PE reset. No mechanism is provided to
disable the mitigation at runtime.
This approach permanently mitigates the EL3 software stack only. Other
software components are responsible to enable it for their exception
levels.
TF-A implements this approach for the Denver CPUs with DENVER_MIDR_PN3
and earlier:
* By setting bit 11 (Disable speculative store buffering) of
`ACTLR_EL3`
* By setting bit 9 (Disable speculative memory disambiguation) of
`ACTLR_EL3`
TF-A implements this approach for the Denver CPUs with DENVER_MIDR_PN4
and later:
* By setting bit 18 (Disable speculative store buffering) of
`ACTLR_EL3`
* By setting bit 17 (Disable speculative memory disambiguation) of
`ACTLR_EL3`
Change-Id: If1de96605ce3f7b0aff5fab2c828e5aecb687555
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Varun Wadekar
committed
on 4 Sep 2018
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cpus: denver: reset power state to 'C1' on boot
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Denver CPUs expect the power state field to be reset to 'C1'
during boot. This patch updates the reset handler to reset the
ACTLR_.PMSTATE field to 'C1' state during CPU boot.
Change-Id: I7cb629627a4dd1a30ec5cbb3a5e90055244fe30c
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Varun Wadekar
committed
on 4 Sep 2018
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denver: use plat_my_core_pos() to get core position
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The current functions to disable and enable Dynamic Code Optimizer
(DCO) assume that all denver cores are in the same cluster. They
ignore AFF1 field of the mpidr_el1 register, which leads to
incorect logical core id calculation.
This patch calls the platform handler, plat_my_core_pos(), to get
the logical core id to disable/enable DCO for the core.
Original change by: Krishna Sitaraman <ksitaraman@nvidia.com>
Change-Id: I45fbd1f1eb032cc1db677a4fdecc554548b4a830
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Varun Wadekar
committed
on 4 Sep 2018
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2018-09-03 |
Merge pull request #1484 from nathan-menhorn/tee-validate-header-603
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Update optee_utils.c to fix ARM-software/tf-issues#603
Soby Mathew
authored
on 3 Sep 2018
GitHub
committed
on 3 Sep 2018
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2018-08-30 |
libc: Fix some MISRA defects
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No functional changes.
Change-Id: I907aa47565af2a6c435a5560041fd2b59e65c25c
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz
committed
on 30 Aug 2018
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Merge pull request #1544 from jwerner-chromium/JW_handle_ea
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context_mgmt: Fix HANDLE_EA_EL3_FIRST implementation
Dimitris Papastamos
authored
on 30 Aug 2018
GitHub
committed
on 30 Aug 2018
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backtrace: Print backtrace in assert() and panic()
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When any of these functions is called the backtrace will be printed to
the console.
Change-Id: Id60842df824b320c485a9323ed6b80600f4ebe35
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz
committed
on 30 Aug 2018
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2018-08-29 |
context_mgmt: Fix HANDLE_EA_EL3_FIRST implementation
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This patch fixes a bug in the context management code that causes it to
ignore the HANDLE_EA_EL3_FIRST compile-time option and instead always
configure SCR_EL3 to force all external aborts to trap into EL3. The
code used #ifdef to read compile-time option declared with add_define in
the Makefile... however, those options are always defined, they're just
defined to either 0 or 1, so #if is the correct syntax to check for
them. Also update the documentation to match.
This bug has existed since the Nov 2017 commit 76454abf4 (AArch64:
Introduce External Abort handling), which changed the
HANDLE_EA_EL3_FIRST option to use add_define.
Change-Id: I7189f41d0daee78fa2fcf4066323e663e1e04d3d
Signed-off-by: Julius Werner <jwerner@chromium.org>
Julius Werner
committed
on 29 Aug 2018
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2018-08-23 |
Fixed ARM-software/tf-issues#603
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Updated optee_utils.c to fix ARM-software/tf-issues#603 related to the
tee-validate-header bug.
Minor updates to the header valid checking logic. It would never make
sense to have less than 1 image to load so this is now checked.
Changed OPTEE_MAX_IMAGE_NUM to OPTEE_MAX_NUM_IMAGES to clarify its
definition. OPTEE_MAX_IMAGE_NUM sounds like an ID assigned to the last
image to load. OPTEE_MAX_NUM_IMAGES sounds like the maximum number of
images to load.
Signed-off-by: Nathan Menhorn <nathan.menhorn@xilinx.com>
nathan-menhorn
authored
on 17 Jul 2018
Nathan Menhorn
committed
on 23 Aug 2018
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DSU erratum 936184 workaround: bug fix
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The initial implementation was corrupting registers that it shouldn't.
Now this is fixed.
Change-Id: Iaa407c18e668b2d9381391bf10d6876fe936aded
Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
John Tsichritzis
committed
on 23 Aug 2018
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2018-08-22 |
libc: armclang: Implement compiler printf symbols
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armclang replaces calls to printf by calls to one of the symbols
__0printf, __1printf or __2printf. This patch adds new functions with
these names that internally call printf so that the Trusted Firmware can
be compiled with this compiler.
Change-Id: I06a0e3e5001232fe5b2577615666ddd66e81eef0
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz
committed
on 22 Aug 2018
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libc: Use printf and snprintf across codebase
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tf_printf and tf_snprintf are now called printf and snprintf, so the
code needs to be updated.
Change-Id: Iffeee97afcd6328c4c2d30830d4923b964682d71
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz
committed
on 22 Aug 2018
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libc: Move tf_printf and tf_snprintf to libc
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Change their names to printf and snprintf. They are much smaller than
the previous versions we had, which makes them better suited for the
Trusted Firmware.
Change-Id: Ia872af91b7b967c47fce012eccecede7873a3daf
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz
committed
on 22 Aug 2018
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libc: Fix all includes in codebase
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The codebase was using non-standard headers. It is needed to replace
them by the correct ones so that we can use the new libc headers.
Change-Id: I530f71d9510cb036e69fe79823c8230afe890b9d
Acked-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz
committed
on 22 Aug 2018
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libc: Add AArch32 and AArch64 headers
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Change-Id: I4f58bb4660078c9bc76d2826c90b2fa711719a3e
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz
committed
on 22 Aug 2018
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libc: Cleanup FreeBSD files
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Remove code specific to FreeBSD so that they can be used in this
repository.
Change-Id: I5c11eb5b3c05a7fb91aed08371a1f7a0e6122a94
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz
committed
on 22 Aug 2018
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libc: Import files from FreeBSD
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From commit aafd1cf :
- sys/sys/endian.h
- sys/arm/include/endian.h
- sys/arm64/include/endian.h
- sys/sys/errno.h
- lib/libc/strchr.c
- lib/libc/strcmp.c
- lib/libc/strncmp.c
- lib/libc/strnlen.c
strcasecmp() hasn't been imported.
Change-Id: I8a0787aec9ba8960a008fb5c66f7a73c84919b93
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz
committed
on 22 Aug 2018
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libc: Introduce cdefs.h, assert.h and strlen.c
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Change-Id: I76091d52571f1950111c4b1670d5fc3883607715
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz
committed
on 22 Aug 2018
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libc: Cleanup remaining files
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The existing files had some style problems that this patch fixes.
Change-Id: I794e0d96e52f8da0ffa0d70a41f36c4432b4e563
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz
committed
on 22 Aug 2018
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libc: Remove printf-like functions
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They are too big for the Trusted Firmware, and it can be confusing to
have two versions of the same functions with different names. tf_printf
and tf_snprintf will replace them in the next patch.
Change-Id: I978414ac169cc3156e249549ef101a70eb31a295
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz
committed
on 22 Aug 2018
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libc: Remove sscanf() and timingsafe_bcmp()
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sscanf() is unused and it doesn't work, so it doesn't make sense to
keep it.
timingsafe_bcmp() isn't used anywhere.
Change-Id: Ib5d28ff21d0f3ccc36c5c0fb5474b3384105cf80
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz
committed
on 22 Aug 2018
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libc: Remove non-Arm files
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Remove all files that don't have only Arm copyright. This is the first
step to cleanup the C library in this repository. They will be re-added
in the following patches.
Change-Id: I72c40a1620d1df3228fc397ec695d569a20245fd
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz
committed
on 22 Aug 2018
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Merge pull request #1532 from jeenu-arm/misra-fixes
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MISRA fixes
Dimitris Papastamos
authored
on 22 Aug 2018
GitHub
committed
on 22 Aug 2018
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Merge pull request #1533 from jeenu-arm/mpam
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AArch64: Enable MPAM for lower ELs
Dimitris Papastamos
authored
on 22 Aug 2018
GitHub
committed
on 22 Aug 2018
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2018-08-20 |
Merge pull request #1388 from vwadekar/report-cve-2017-5715
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cpus: denver: report CVE_2017_5715 mitigation to higher layers
Dimitris Papastamos
authored
on 20 Aug 2018
GitHub
committed
on 20 Aug 2018
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RAS: MISRA fixes
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These changes address most of the required MISRA rules. In the process,
some from generic code is also fixed.
No functional changes.
Change-Id: I76cacf6e1d73b09510561b5090c2bb66d81bec88
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
Jeenu Viswambharan
committed
on 20 Aug 2018
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