2019-04-02 |
meson/gxl: Add support for SHA256 DMA engine
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In order to configure and boot SCP, BL31 has to compute and send
the SHA-256 of the firmware data via scpi. Luckily Amlogic GXL SOC
has a DMA facility that could be used to offload SHA-256
computations. This adds basic support of this hardware SHA-256
engine.
Signed-off-by: Remi Pommarel <repk@triplefau.lt>
Remi Pommarel
committed
on 2 Apr 2019
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2019-04-01 |
rcar_gen3: drivers: qos: Add D3 QoS tables
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Add QoS tables for R-Car D3 SoC.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Marek Vasut
committed
on 1 Apr 2019
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rcar_gen3: drivers: pfc: Add D3 PFC tables
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Add PFC tables for R-Car D3 SoC.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Marek Vasut
committed
on 1 Apr 2019
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rcar_gen3: drivers: ddr_a: Add D3 DDR init
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Add R-Car D3 DDR initialization code. The code is in staging and needs
cleanup, and possibly can even be merged with the E3 init code.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Marek Vasut
committed
on 1 Apr 2019
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rcar_gen3: drivers: swdt: Add D3 support
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Add WTCNT register configuration for the D3 SoC.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Marek Vasut
committed
on 1 Apr 2019
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rcar_gen3: drivers: scif: Add D3 support
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Add SCIF configuration specifics for the D3 SoC, that is detection
of the D3 SoC and SCBRR configuration.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Marek Vasut
committed
on 1 Apr 2019
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rcar_gen3: drivers: pwrc: Add D3 support
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The D3 SoC has one CPU core, just return 1 as a CPU number.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Marek Vasut
committed
on 1 Apr 2019
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rcar_gen3: drivers: rom: Mark NEW table as D3 compatible
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Add comment into the ROM driver that the new table is also D3 compatible.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Marek Vasut
committed
on 1 Apr 2019
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rcar_gen3: plat: Add initial D3 support
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Add R-Car D3 SoC platform specifics. Driver, PFC, QoS, DDR init code
will be added separately.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Marek Vasut
committed
on 1 Apr 2019
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Remove several warnings reported with W=2
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Improved support for W=2 compilation flag by solving some nested-extern
and sign-compare warnings.
The libraries are compiling with warnings (which turn into errors with
the Werror flag).
Outside of libraries, some warnings cannot be fixed.
Change-Id: I06b1923857f2a6a50e93d62d0274915b268cef05
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
Ambroise Vincent
committed
on 1 Apr 2019
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Remove several warnings reported with W=1
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Improved support for W=1 compilation flag by solving missing-prototypes
and old-style-definition warnings.
The libraries are compiling with warnings (which turn into errors with
the Werror flag).
Outside of libraries, some warnings cannot be fixed without heavy
structural changes.
Change-Id: I1668cf99123ac4195c2a6a1d48945f7a64c67f16
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
Ambroise Vincent
committed
on 1 Apr 2019
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2019-03-22 |
driver: synosys: Fix SD MMC not initializing correctly
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dw_params.mmc_dev_type should be assigned before mmc_init, otherwise SDMMC
initialization will fail as the initialization treats the device as EMMC
instead of SD.
Signed-off-by: Tien Hock, Loh <tien.hock.loh@intel.com>
Tien Hock, Loh
committed
on 22 Mar 2019
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2019-03-13 |
Merge pull request #1879 from pbeesley-arm/pb/todo-removal
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Pb/todo removal
Soby Mathew
authored
on 13 Mar 2019
GitHub
committed
on 13 Mar 2019
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Merge pull request #1874 from hadi-asyrafi/qspi_boot
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intel: QSPI boot enablement
Soby Mathew
authored
on 13 Mar 2019
GitHub
committed
on 13 Mar 2019
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Merge pull request #1858 from thloh85-intel/dwmmc_fixes
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drivers: synopsys: Fix synopsys MMC driver
Soby Mathew
authored
on 13 Mar 2019
GitHub
committed
on 13 Mar 2019
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Merge pull request #1856 from masahisak/synquacer-scmi-support
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plat/synquacer: enable SCMI support
Soby Mathew
authored
on 13 Mar 2019
GitHub
committed
on 13 Mar 2019
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2019-03-12 |
intel: QSPI boot enablement
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Manages QSPI initialization, configuration and IO handling as boot device
Signed-off-by: Muhammad Hadi Asyrafi Abdul Halim <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Muhammad Hadi Asyrafi Abdul Halim
committed
on 12 Mar 2019
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plat/synquacer: enable SCMI support
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Enable the SCMI protocol support in SynQuacer platform.
Aside from power domain, system power and apcore management protocol,
this commit adds the vendor specific protocol(0x80).
This vendor specific protocol is used to get the dram mapping information
from SCP.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Masahisa Kojima
committed
on 12 Mar 2019
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drivers: Remove TODO from io_fip.c
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The comment suggests checking version numbers and
a checksum but there doesn't seem to be any usable
data for either of these.
For example, fip_toc_header_t doesn't contain any
version information and neither does fip_toc_entry_t.
As the function name "is_valid_header" suggests, this
function is not concerned with checksumming any of
the table of contents entries.
Change-Id: I8673ae5dd37793771760169f26b2f55c15fbf587
Signed-off-by: Paul Beesley <paul.beesley@arm.com>
Paul Beesley
committed
on 12 Mar 2019
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drivers: Remove TODO from io_storage
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This TODO was added five years ago so I assume that there is not
going to be a shutdown API added after all.
Change-Id: If0f4e2066454df773bd9bf41ed65d3a10248a2d3
Signed-off-by: Paul Beesley <paul.beesley@arm.com>
Paul Beesley
committed
on 12 Mar 2019
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drivers: synopsys: Fix synopsys MMC driver
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There are some issues with synopsys MMC driver:
- CMD8 should not expect data (for SD)
- ACMD51 should expect data (Send SCR for SD)
- dw_prepare should not dictate size to be MMC_BLOCK_SIZE, block size is
now handled in the dw_prepare function
- after the CMD completes, when doing dw_read, we need to invalidate cache
and wait for the data transfer to complete
- Need to set FIFO threshold, otherwise DMA might never get the interrupt
to read or write
Signed-off-by: Tien Hock, Loh <tien.hock.loh@intel.com>
Tien Hock, Loh
committed
on 12 Mar 2019
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2019-03-08 |
mmc: stm32_sdmmc2: fill ocr_voltage
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STM32MP1 SDMMC device voltage is 3.3V. We should then precise the 2 ranges
3.2 to 3.3V and 3.3 to 3.4V in ocr_voltage field.
Change-Id: I88e479f8f16bfe608a7808eace0df3fdec48deab
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Yann Gautier
committed
on 8 Mar 2019
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Merge pull request #1863 from thloh85-intel/mmc_fixes
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drivers: mmc: Fix some issues with MMC stack
Dimitris Papastamos
authored
on 8 Mar 2019
GitHub
committed
on 8 Mar 2019
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2019-03-06 |
drivers: mmc: Fix some issues with MMC stack
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Some bugs in MMC stack needs to be fixed:
- scr cannot be local as this will cause cache issue when invalidating
after the read DMA transfer is completed
- ACMD41 needs to send voltage information in initialization, otherwise the
command is a query, thus will not initialize the controller
- when checking device state, retry until the retries counter goes to zero
before failing
Signed-off-by: Tien Hock, Loh <tien.hock.loh@intel.com>
Tien Hock, Loh
committed
on 6 Mar 2019
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2019-03-05 |
Merge pull request #1847 from jts-arm/mbedtls
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Remove Mbed TLS dependency from plat_bl_common.c
Antonio Niño Díaz
authored
on 5 Mar 2019
GitHub
committed
on 5 Mar 2019
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2019-03-04 |
rcar_gen3: drivers: pfc: Configure GP5_09 as input on ULCB
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Configure the GPIO5 09 pin as input on the ULCB board by default,
since the pin is routed on the expansion connector and not connected
to anything by default.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Marek Vasut
committed
on 4 Mar 2019
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rcar_gen3: Add M3-W 3.0 support
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Add support for the M3W 3.0 SoC and synchronize the upstream ATF with
Renesas downstream ATF release v2.0.1.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Marek Vasut
committed
on 4 Mar 2019
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2019-02-28 |
Remove Mbed TLS dependency from plat_bl_common.c
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Due to the shared Mbed TLS heap optimisation introduced in 6d01a463,
common code files were depending on Mbed TLS specific headers. This
dependency is now removed by moving the default, unoptimised heap
implementation inside the Mbed TLS specific files.
Change-Id: I11ea3eb4474f0d9b6cb79a2afd73a51a4a9b8994
Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
John Tsichritzis
committed
on 28 Feb 2019
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Minor changes to documentation and comments
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Fix some typos and clarify some sentences.
Change-Id: Id276d1ced9a991b4eddc5c47ad9a825e6b29ef74
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz
committed
on 28 Feb 2019
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2019-02-26 |
rpi3: sdhost: SDHost driver improvement
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This commit improves the SDHost driver for RPi3 as following:
* Unblock MMC_CMD(17). Using MMC_CMD(17) is more efficient on
block reading.
* In some low probability that SEND_OP_COND might results CRC7
error. We can consider that the command runs correctly. We don't
need to retry this command so removing the code for retry.
* Using MMC_BUS_WIDTH_1 as MMC default value to improve the stability.
* Increase the clock to 50Mhz in data mode to speed up the io.
* Change the pull resistors configuration to gain more stability.
Signed-off-by: Ying-Chun Liu (PaulLiu) <paulliu@debian.org>
Ying-Chun Liu (PaulLiu)
committed
on 26 Feb 2019
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