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2017-01-31	bcc2bf0 Browse files » Merge pull request #821 from jeenu-arm/errata-printing ... Errata printing infrastructure danh-arm authored on 31 Jan 2017 GitHub committed on 31 Jan 2017
2017-01-30	10bcd76 Browse files » Report errata workaround status to console ... The errata reporting policy is as follows: - If an errata workaround is enabled: - If it applies (i.e. the CPU is affected by the errata), an INFO message is printed, confirming that the errata workaround has been applied. - If it does not apply, a VERBOSE message is printed, confirming that the errata workaround has been skipped. - If an errata workaround is not enabled, but would have applied had it been, a WARN message is printed, alerting that errata workaround is missing. The CPU errata messages are printed by both BL1 (primary CPU only) and runtime firmware on debug builds, once for each CPU/errata combination. Relevant output from Juno r1 console when ARM Trusted Firmware is built with PLAT=juno LOG_LEVEL=50 DEBUG=1: VERBOSE: BL1: cortex_a57: errata workaround for 806969 was not applied VERBOSE: BL1: cortex_a57: errata workaround for 813420 was not applied INFO: BL1: cortex_a57: errata workaround for disable_ldnp_overread was applied WARNING: BL1: cortex_a57: errata workaround for 826974 was missing! WARNING: BL1: cortex_a57: errata workaround for 826977 was missing! WARNING: BL1: cortex_a57: errata workaround for 828024 was missing! WARNING: BL1: cortex_a57: errata workaround for 829520 was missing! WARNING: BL1: cortex_a57: errata workaround for 833471 was missing! ... VERBOSE: BL31: cortex_a57: errata workaround for 806969 was not applied VERBOSE: BL31: cortex_a57: errata workaround for 813420 was not applied INFO: BL31: cortex_a57: errata workaround for disable_ldnp_overread was applied WARNING: BL31: cortex_a57: errata workaround for 826974 was missing! WARNING: BL31: cortex_a57: errata workaround for 826977 was missing! WARNING: BL31: cortex_a57: errata workaround for 828024 was missing! WARNING: BL31: cortex_a57: errata workaround for 829520 was missing! WARNING: BL31: cortex_a57: errata workaround for 833471 was missing! ... VERBOSE: BL31: cortex_a53: errata workaround for 826319 was not applied INFO: BL31: cortex_a53: errata workaround for disable_non_temporal_hint was applied Also update documentation. Change-Id: Iccf059d3348adb876ca121cdf5207bdbbacf2aba Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com> Jeenu Viswambharan committed on 30 Jan 2017
2017-01-26	186cbd0 Browse files » user-guide.md: Fix FVP references ... The current user guide mentions that Foundation model doesn't support debugger interface. Clarify that all FVPs support --cadi-server option such that a CADI-compliant debugger can connect to and control model execution. Also fix broken URL to FVP home page. Change-Id: Ia14d618a4e0abb4b228eb1616040f9b51fb3f6f9 Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com> Jeenu Viswambharan committed on 26 Jan 2017
2016-12-20	67748e4 Browse files » Merge pull request #788 from jeenu-arm/cpuops-framework ... Add provision to extend CPU operations at more levels danh-arm authored on 20 Dec 2016 GitHub committed on 20 Dec 2016
	34ba298 Browse files » Improve FWU documentation ... - Clarify the documentation of the 'FWU_SMC_IMAGE_COPY' SMC in the Firmware Update guide. Also extend the list of pre-conditions to include the additional input validation implemented by previous patches. - Improve documentation of bl1_plat_mem_check() in the porting guide. It now specifies that the generic FWU code protects bl1_plat_mem_check() from integer overflows resulting from the addition of the base address and size passed in arguments. Change-Id: I07b47a3778df7b9c089529b2dd2135707640a91c Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com> Sandrine Bailleux authored on 11 Nov 2016 Dan Handley committed on 20 Dec 2016
	19d2595 Browse files » Merge pull request #785 from dp-arm/dp/nvcounter Dan Handley committed on 20 Dec 2016
2016-12-19	78b4c5b Browse files » Merge pull request #778 from antonio-nino-diaz-arm/an/xlat-fixes ... Fixes and improvements to translation tables library danh-arm authored on 19 Dec 2016 GitHub committed on 19 Dec 2016
2016-12-15	8434f76 Browse files » Update Foundation Model version ... Foundation Model release 10.2 has been made available and Trusted Firmware has been tested against that it as part of its CI system. This patch updates the user guide documentation to reflect the version of Foundation Model that Trusted Firmware has been tested against. Change-Id: I8571e1027b24892b41d04b93b24245a371ca2cae Signed-off-by: David Cunado <david.cunado@arm.com> David Cunado committed on 15 Dec 2016
	5dd9dbb Browse files » Add provision to extend CPU operations at more levels ... Various CPU drivers in ARM Trusted Firmware register functions to handle power-down operations. At present, separate functions are registered to power down individual cores and clusters. This scheme operates on the basis of core and cluster, and doesn't cater for extending the hierarchy for power-down operations. For example, future CPUs might support multiple threads which might need powering down individually. This patch therefore reworks the CPU operations framework to allow for registering power down handlers on specific level basis. Henceforth: - Generic code invokes CPU power down operations by the level required. - CPU drivers explicitly mention CPU_NO_RESET_FUNC when the CPU has no reset function. - CPU drivers register power down handlers as a list: a mandatory handler for level 0, and optional handlers for higher levels. All existing CPU drivers are adapted to the new CPU operations framework without needing any functional changes within. Also update firmware design guide. Change-Id: I1826842d37a9e60a9e85fdcee7b4b8f6bc1ad043 Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com> Jeenu Viswambharan committed on 15 Dec 2016
	d35dee2 Browse files » tbbr: Fix updating of Non-Trusted NV counter ... The previous code required that a certificate be signed with the ROT key before the platform's NV counter could be updated with the value in the certificate. This implies that the Non-Trusted NV counter was not being updated for Non-Trusted content certificates, as they cannot be signed with the ROT key in the TBBR CoT scheme. The code is reworked to only allow updating the platform's Trusted NV counter when a certificate protected by the Trusted NV counter is signed with the ROT key. Content certificates protected by the Non-Trusted NV counter are allowed to update the platform's Non-Trusted NV counter, assuming that the certificate value is higher than the platform's value. A new optional platform API has been introduced, named plat_set_nv_ctr2(). Platforms may choose to implement it and perform additional checks based on the authentication image descriptor before modifying the NV counters. A default weak implementation is available that just calls into plat_set_nv_ctr(). Fixes ARM-software/tf-issues#426 Change-Id: I4fc978fd28a3007bc0cef972ff1f69ad0413b79c Signed-off-by: dp-arm <dimitris.papastamos@arm.com> dp-arm committed on 15 Dec 2016
2016-12-13	0029624 Browse files » Add PLAT_xxx_ADDR_SPACE_SIZE definitions ... Added the definitions `PLAT_PHY_ADDR_SPACE_SIZE` and `PLAT_VIRT_ADDR_SPACE_SIZE` which specify respectively the physical and virtual address space size a platform can use. `ADDR_SPACE_SIZE` is now deprecated. To maintain compatibility, if any of the previous defines aren't present, the value of `ADDR_SPACE_SIZE` will be used instead. For AArch64, register ID_AA64MMFR0_EL1 is checked to calculate the max PA supported by the hardware and to verify that the previously mentioned definition is valid. For AArch32, a 40 bit physical address space is considered. Added asserts to check for overflows. Porting guide updated. Change-Id: Ie8ce1da5967993f0c94dbd4eb9841fc03d5ef8d6 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Antonio Nino Diaz committed on 13 Dec 2016
2016-12-13	adefa3d Browse files » Docs: Fix monospace formatting in user guide ... Change-Id: I28b2790ff2f87b9fe3cf1020e59e1e0a00be6f97 Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com> Jeenu Viswambharan committed on 13 Dec 2016
2016-11-22	5c0df52 Browse files » Merge pull request #762 from douglas-raillard-arm/dr/doc_build_info ... Clarify dependency for PSCI_EXTENDED_STATE_ID danh-arm authored on 22 Nov 2016 GitHub committed on 22 Nov 2016
	52ec41a Browse files » Merge pull request #755 from vwadekar/trusty-spd ... spd: dispatcher for interacting with the Trusty TEE danh-arm authored on 22 Nov 2016 GitHub committed on 22 Nov 2016
	91a422d Browse files » Clarify dependency for PSCI_EXTENDED_STATE_ID ... Add dependency information in the user guide for ARM_RECOM_STATE_ID_ENC that needs to be set when using PSCI_EXTENDED_STATE_ID on ARM platforms. Also clarify the build error message. Change-Id: Id125a0299b179f5f222bca4e2503204bf89a3c59 Signed-off-by: Douglas Raillard <douglas.raillard@arm.com> Douglas Raillard committed on 22 Nov 2016
2016-11-21	18c7c2d Browse files » Merge pull request #758 from douglas-raillard-arm/dr/doc_interrupt_handler ... Docs: Clarify IRQ/FIQ handler API in Interrupt Design Guide danh-arm authored on 21 Nov 2016 GitHub committed on 21 Nov 2016
2016-11-17	94a8ca2 Browse files » Docs: Clarify IRQ/FIQ handler API in Interrupt Design Guide ... The API description currently states that interrupt handlers (interrupt_type_handler_t pointers) SHOULD return a pointer to the target cpu_context. This patch rewords the description of the interrupts handlers to state that it MUST return a pointer to the target security context. It also warns about potential portability issue. Specifically, this pointer is not used on AArch64 and calls to context library APIs must be used to ask BL31 to return to a specific context. However, this could change in the future and interrupt handlers must always return the pointer. Change-Id: I3f82a046de4d7a5b51a8cbebe7eb2a00dbbdb4f0 Signed-off-by: Douglas Raillard <douglas.raillard@arm.com> Douglas Raillard committed on 17 Nov 2016
2016-11-16	686019d Browse files » Merge pull request #757 from douglas-raillard-arm/dr/doc_plat_psci_ops ... Document plat_psci_ops.(system_off\|system_reset) danh-arm authored on 16 Nov 2016 GitHub committed on 16 Nov 2016
2016-11-14	b3fa89a Browse files » firmware-design.md: Fix broken link ... Fix a link broken by a missing space that turned it into a link to an non-existent anchor. Change-Id: Ie863e963db28afa3a28b69d3f63bd7638bdf5af9 Signed-off-by: Douglas Raillard <douglas.raillard@arm.com> Douglas Raillard committed on 14 Nov 2016
2016-11-14	7dd570e Browse files » Document plat_psci_ops.(system_off\|system_reset) ... fixes ARM-Software/tf-issues#346 Change-Id: I946c8eab650bba7407775462ce91f394d767e079 Signed-off-by: Douglas Raillard <douglas.raillard@arm.com> Douglas Raillard committed on 14 Nov 2016
2016-11-08	948c090 Browse files » spd: dispatcher for interacting with the Trusty TEE ... This patch adds the secure payload dispatcher for interacting with Google's Trusty TEE. Documentation for Trusty can be found at https://source.android.com/security/trusty Original authors: ----------------- * Arve Hjønnevåg <arve@android.com> * Michael Ryleev <gmar@google.com> Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Varun Wadekar committed on 8 Nov 2016
2016-11-08	01920cf Browse files » docs: Reorder build options alphabetically ... At present, build options in the user guide aren't listed in any specific order. Ordering them alphabetically is a standard practice, and is also easier on the reader. Contents unchanged. Change-Id: Ibc36f3a2a576edb86c1a402430d2ef5adcb2f144 Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com> Jeenu Viswambharan committed on 8 Nov 2016
2016-11-03	d19ce2c Browse files » Merge pull request #749 from sandrine-bailleux-arm/sb/fix-bl1_plat_mem_check-doc ... Porting guide: Improve bl1_plat_mem_check() doc danh-arm authored on 3 Nov 2016 GitHub committed on 3 Nov 2016
	ba78977 Browse files » Porting guide: Improve bl1_plat_mem_check() doc ... This patch fixes the type of the return value of bl1_plat_mem_check() in the porting guide. It also specifies the expected return value. Change-Id: I7c437342b8bfb1e621d74b2edf0aaf97b913216a Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com> Sandrine Bailleux committed on 3 Nov 2016
	fc1d1e2 Browse files » user guide: Document `ENABLE_RUNTIME_INSTRUMENTATION` option ... Change-Id: I8e50df67e860b9589834445761a7b9927690fdce Signed-off-by: dp-arm <dimitris.papastamos@arm.com> dp-arm committed on 3 Nov 2016
2016-10-24	ba21b75 Browse files » Docs: fix a typo in Porting Guide about plat_get_my_entrypoint() ... Do not double the phrase "called with the". Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Masahiro Yamada committed on 24 Oct 2016
2016-10-18	97fa6f5 Browse files » Merge pull request #677 from hzhuang1/gpt ... partition: check GPT partition table danh-arm authored on 18 Oct 2016 GitHub committed on 18 Oct 2016
2016-10-13	v1.3 6bb37ad Browse files » Merge pull request #733 from danh-arm/dh/v1.3-final ... Final updates for v1.3 release davidcunado-arm authored on 13 Oct 2016 GitHub committed on 13 Oct 2016
	49db6f1 Browse files » Release v1.3: Minor updates to user guide ... Updated the user guide to clarify building FIP for AArch32. The instructions were previously specific to building a FIP for AArch64. Change-Id: I7bd1a6b8e810cfda411f707e04f479006817858e Signed-off-by: David Cunado <david.cunado@arm.com> David Cunado committed on 13 Oct 2016
	6ad67cc Browse files » Release v1.3: update change-log.md ... Updated change-log.md with summary of changes since release v1.2. Change-Id: Ia1e18ff4b0da567cf12dfcb53e6317e995100bdf David Cunado authored on 3 Oct 2016 Dan Handley committed on 13 Oct 2016