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2020-07-26	6f0a2f0 Browse files » SMCCC: Introduce function to check SMCCC function availability ... Currently, 'SMCCC_ARCH_FEATURES' SMC call handler unconditionally returns 'SMC_OK' for 'SMCCC_ARCH_SOC_ID' function. This seems to be not correct for the platform which doesn't implement soc-id functionality i.e. functions to retrieve both soc-version and soc-revision. Hence introduced a platform function which will check whether SMCCC feature is available for the platform. Also, updated porting guide for the newly added platform function. Change-Id: I389f0ef6b0837bb24c712aa995b7176117bc7961 Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com> Manish V Badarkhe committed on 26 Jul 2020
2020-07-22	a07c101 Browse files » plat/arm: Move fconf population after the enablement of MMU ... In BL2, fw_config's population happened before the cache gets enabled. Hence to boost the performance, moved fw_config's population after cache gets enabled (i.e. after MMU gets enabled). Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com> Change-Id: I2e75cabd76b1cb7a660f6b72f409ab40d2877284 Manish V Badarkhe authored on 16 Jul 2020 Manish V Badarkhe committed on 22 Jul 2020
2020-07-21	7b4e1fb Browse files » TF-A: Add support for Measured Boot driver ... This patch adds support for Measured Boot driver functionality in common Arm platform code. Change-Id: If049dcf8d847c39023b77c0d805a8cf5b8bcaa3e Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com> Alexei Fedorov committed on 21 Jul 2020
2020-07-10	2a0ef94 Browse files » plat/arm, dts: Update platform device tree for CoT ... Included cot_descriptors.dtsi in platform device tree (fvp_tb_fw_config.dts). Also, updated the maximum size of tb_fw_config to 0x1800 in order to accomodate the device tree for CoT descriptors. Follow up patch will parse the device tree for these CoT descriptors and fill the CoT descriptor structures at runtime instead of using static CoT descriptor structures in the code base. Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com> Change-Id: I90122bc713f6842b82fb019b04caf42629b4f45a Manish V Badarkhe authored on 29 Jun 2020 Sandrine Bailleux committed on 10 Jul 2020
2020-06-26	edd8188 Browse files » Merge changes Ib9c82b85,Ib348e097,I4dc315e4,I58a8ce44,Iebc03361, ... into integration ... * changes: plat: marvell: armada: a8k: add OP-TEE OS MMU tables drivers: marvell: add support for mapping the entire LLC to SRAM plat: marvell: armada: add LLC SRAM CCU setup for AP806/AP807 platforms plat: marvell: armada: reduce memory size reserved for FIP image plat: marvell: armada: platform definitions cleanup plat: marvell: armada: a8k: check CCU window state before loading MSS BL2 drivers: marvell: add CCU driver API for window state checking drivers: marvell: align and extend llc macros plat: marvell: a8k: move address config of cp1/2 to BL2 plat: marvell: armada: re-enable BL32_BASE definition plat: marvell: a8k: extend includes to take advantage of the phy_porting_layer marvell: comphy: initialize common phy selector for AP mode marvell: comphy: update rx_training procedure plat: marvell: armada: configure amb for all CPs plat: marvell: armada: modify PLAT_FAMILY name for 37xx SoCs Manish Pandey authored on 26 Jun 2020 TrustedFirmware Code Review committed on 26 Jun 2020
2020-06-25	ce4ca1a Browse files » plat/arm: Increase size of firmware configuration area ... Increased the size of firmware configuration area to accommodate all configs. Updated maximum size of following bootloaders due to increase in firmware configs size and addition of the code in the BL2. 1. Increased maximum size of BL2 for Juno platform in no optimisation case. 2. Reduced maximum size of BL31 for fvp and Juno platform. 3. Reduced maximum size of BL32 for Juno platform. Change-Id: Ifba0564df0d1fe86175bed9fae87fdcf013b1831 Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com> Manish V Badarkhe committed on 25 Jun 2020
2020-06-25	8286967 Browse files » plat/arm: Load and populate fw_config and tb_fw_config ... Modified the code to do below changes: 1. Load tb_fw_config along with fw_config by BL1. 2. Populate fw_config device tree information in the BL1 to load tb_fw_config. 3. In BL2, populate fw_config information to retrieve the address of tb_fw_config and then tb_fw_config gets populated using retrieved address. 4. Avoid processing of configuration file in case of error value returned from "fw_config_load" function. 5. Updated entrypoint information for BL2 image so that it's arg0 should point to fw_config address. Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com> Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com> Change-Id: Ife6f7b673a074e7f544ee3d1bda7645fd5b2886c Manish V Badarkhe committed on 25 Jun 2020
2020-06-24	04e0697 Browse files » fconf: Clean confused naming between TB_FW and FW_CONFIG ... Cleaned up confused naming between TB_FW and FW_CONFIG. Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com> Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com> Change-Id: I9e9f6e6ca076d38fee0388f97d370431ae067f08 Manish V Badarkhe committed on 24 Jun 2020
2020-06-19	47d1773 Browse files » plat: marvell: armada: a8k: add OP-TEE OS MMU tables ... Adjust the latest OP-TEE memory definitions to the newest TF-A baseline. Change-Id: Ib9c82b85f868adaf3c7285eb340486bda9c59c36 Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Konstantin Porotchkin authored on 15 Apr 2019 Marcin Wojtas committed on 19 Jun 2020
	63a0b12 Browse files » plat: marvell: armada: platform definitions cleanup ... - Remove TRUSTED_DRAM_BASE TRUSTED_DRAM_SIZE MARVELL_TRUSTED_SRAM_BASE - Rename PLAT_MARVELL_TRUSTED_DRAM_* -> PLAT_MARVELL_TRUSTED_RAM_* PLAT_MARVELL_TRUSTED_SRAM_* -> MARVELL_TRUSTED_DRAM_* MARVELL_MAP_SHARED_RAM -> MARVELL_MAP_SECURE_RAM - Move MARVELL_TRUSTED_DRAM_SIZE to marvell_def.h - Enable MARVELL_MAP_SECURE_RAM region in BL2U memory map - Add dependency of MARVELL_MAP_SHARED_RAM on LLC_SRAM - Add minor style improvents Change-Id: Iebc03361e4f88489af1597f54e137b27c241814c Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> [Improve patch after rebase] Signed-off-by: Marcin Wojtas <mw@semihalf.com> Konstantin Porotchkin authored on 19 Jun 2020 Marcin Wojtas committed on 19 Jun 2020
	cdfbbfe Browse files » plat: marvell: armada: re-enable BL32_BASE definition ... As a preparation to support proper loading the OPTEE OS image, enable the BL32 specific defines in case the SPD is used. On the occasion move two BL32-related macros to marvell_def.h and fix BL32_LIMIT definition. Change-Id: Id4e2d81833bc1895650cca8b0fc0bfc341cf77f3 Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Signed-off-by: Marcin Wojtas <mw@semihalf.com> Konstantin Porotchkin authored on 14 Mar 2019 Marcin Wojtas committed on 19 Jun 2020
2020-06-18	b5c850d Browse files » plat: marvell: armada: modify PLAT_FAMILY name for 37xx SoCs ... The Marvell Armada 37xx SoCs-based platforms contain a bit awkward directory structure because the currently only one supported PLAT and PLAT_FAMILY are the same. Modify the latter to 'a3k' in order to improve it and keep plat/marvell/armada tree more consistent: plat/marvell/ ├── armada │ ├── a3k │ │ ├── a3700 [...] │ ├── a8k │ │ ├── a70x0 [...] Change-Id: I693a6ef88e6ce49a326a3328875c90bbc186066a Signed-off-by: Marcin Wojtas <mw@semihalf.com> Marcin Wojtas committed on 18 Jun 2020
2020-06-17	9935047 Browse files » Merge changes I80316689,I23cac4fb,If911e7de,I169ff358,I4e040cd5, ... into integration ... * changes: ddr: a80x0: add DDR 32-bit ECC mode support ble: ap807: improve PLL configuration sequence ble: ap807: clean-up PLL configuration sequence ddr: a80x0: add DDR 32-bit mode support plat: marvell: mci: perform mci link tuning for all mci interfaces plat: marvell: mci: use more meaningful name for mci link tuning plat: marvell: a8k: remove wrong or unnecessary comments plat: marvell: ap807: enable snoop filter for ap807 plat: marvell: ap807: update configuration space of each CP plat: marvell: ap807: use correct address for MCIx4 register plat: marvell: add support for PLL 2.2GHz mode plat: marvell: armada: make a8k_common.mk and mss_common.mk more generic marvell: armada: add extra level in marvell platform hierarchy Manish Pandey authored on 17 Jun 2020 TrustedFirmware Code Review committed on 17 Jun 2020
2020-06-09	452d5e5 Browse files » plat/fvp: Add support for dynamic description of secure interrupts ... Using the fconf framework, the Group 0 and Group 1 secure interrupt descriptors are moved to device tree and retrieved in runtime. This feature is enabled by the build flag SEC_INT_DESC_IN_FCONF. Change-Id: I360c63a83286c7ecc2426cd1ff1b4746d61e633c Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com> Madhukar Pappireddy committed on 9 Jun 2020
2020-06-06	a284717 Browse files » marvell: armada: add extra level in marvell platform hierarchy ... This commit is a preparation for upcoming support for OcteonTX and OcteonTX2 product families. Armada platform related files (docs, plat, include/plat) are moved to the new "armada" sub-folder. Change-Id: Icf03356187078ad6a2e56c9870992be3ca4c9655 Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com> Signed-off-by: Marcin Wojtas <mw@semihalf.com> Grzegorz Jaszczyk authored on 5 Nov 2019 Marcin Wojtas committed on 6 Jun 2020
2020-05-31	34dd1e9 Browse files » TF-A: Fix BL31 linker script error ... The patch fixes BL31 linker script error "Init code ends past the end of the stacks" for platforms with number of CPUs less than 4, which is caused by __STACKS_END__ address being lower than __INIT_CODE_END__. The modified BL31 linker script detects such cases and increases the total amount of stack memory, setting __STACKS_END__ = __INIT_CODE_END__, and CPUs' stacks are calculated by BL31 'plat_get_my_stack' function accordingly. For platforms with more than 4 CPUs and __INIT_CODE_END__ < __STACKS_END__ stack memory does not increase and allocated CPUs' stacks match the existing implementation. The patch removes exclusion of PSCI initialization functions from the reclaimed .init section in 'arm_reclaim_init.ld.S' script, which increases the size of reclaimed memory region. Change-Id: I927773e00dd84e1ffe72f9ee534f4f2fc7b6153c Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com> Alexei Fedorov committed on 31 May 2020
2020-05-15	cbf9e84 Browse files » plat/arm/fvp: Support performing SDEI platform setup in runtime ... This patch introduces dynamic configuration for SDEI setup and is supported when the new build flag SDEI_IN_FCONF is enabled. Instead of using C arrays and processing the configuration at compile time, the config is moved to dts files. It will be retrieved at runtime during SDEI init, using the fconf layer. Change-Id: If5c35a7517ba00a9f258d7f3e7c8c20cee169a31 Signed-off-by: Balint Dobszay <balint.dobszay@arm.com> Co-authored-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com> Balint Dobszay authored on 18 Dec 2019 Madhukar Pappireddy committed on 15 May 2020
2020-05-13	23d5ba8 Browse files » SPMD: extract SPMC DTB header size from SPMD ... Currently BL2 passes TOS_FW_CONFIG address and size through registers to BL31. This corresponds to SPMC manifest load address and size. The SPMC manifest is mapped in BL31 by dynamic mapping. This patch removes BL2 changes from generic code (which were enclosed by SPD=spmd) and retrieves SPMC manifest size directly from within SPMD. The SPMC manifest load address is still passed through a register by generic code. Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Change-Id: I35c5abd95c616ae25677302f0b1d0c45c51c042f Olivier Deprez committed on 13 May 2020
2020-05-13	5269694 Browse files » SPMD: code/comments cleanup ... As a follow-up to bdd2596d4, and related to SPM Dispatcher EL3 component and SPM Core S-EL2/S-EL1 component: update with cosmetic and coding rules changes. In addition: -Add Armv8.4-SecEL2 arch detection helper. -Add an SPMC context (on current core) get helper. -Return more meaningful error return codes. -Remove complexity in few spmd_smc_handler switch-cases. -Remove unused defines and structures from spmd_private.h Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Change-Id: I99e642450b0dafb19d3218a2f0e2d3107e8ca3fe Olivier Deprez committed on 13 May 2020
2020-04-03	926cd70 Browse files » Merge changes from topic "brcm_initial_support" into integration ... * changes: doc: brcm: Add documentation file for brcm stingray platform drivers: Add SPI Nor flash support drivers: Add iproc spi driver drivers: Add emmc driver for Broadcom platforms Add BL31 support for Broadcom stingray platform Add BL2 support for Broadcom stingray platform Add bl31 support common across Broadcom platforms Add bl2 setup code common across Broadcom platforms drivers: Add support to retrieve plat_toc_flags Manish Pandey authored on 3 Apr 2020 TrustedFirmware Code Review committed on 3 Apr 2020
	f29d1e0 Browse files » Add BL2 support for Broadcom stingray platform ... Change-Id: I5daa3f2b4b9d85cb857547a588571a9aa8ad05c2 Signed-off-by: Sheetal Tigadoli <sheetal.tigadoli@broadcom.com> Sheetal Tigadoli committed on 3 Apr 2020
	9a40c0f Browse files » Add bl31 support common across Broadcom platforms ... Signed-off-by: Sheetal Tigadoli <sheetal.tigadoli@broadcom.com> Change-Id: Ic1a392a633b447935fa3a7528326c97845f5b1bc Sheetal Tigadoli committed on 3 Apr 2020
	717448d Browse files » Add bl2 setup code common across Broadcom platforms ... Signed-off-by: Sheetal Tigadoli <sheetal.tigadoli@broadcom.com> Change-Id: Iabeaee35c22608c93945c8295bf70947b0f6049a Sheetal Tigadoli committed on 3 Apr 2020
2020-04-02	afe6262 Browse files » Check for out-of-bound accesses in the platform io policies ... The platform io policies array is now always accessed through a fconf getter. This gives us an ideal spot to check for out-of-bound accesses. Remove the assertion in plat_get_image_source(), which is now redundant. Change-Id: Iefe808d530229073b68cbd164d927b8b6662a217 Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com> Sandrine Bailleux committed on 2 Apr 2020
2020-03-30	53adeba Browse files » Create separate header for ARM specific SMCCC defines ... Moved SMCCC defines from plat_arm.h to new <smccc_def.h> header and include this header in all ARM platforms. Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com> Change-Id: I4cbc69c7b9307461de87b7c7bf200dd9b810e485 Manish V Badarkhe authored on 27 Mar 2020 Manish V Badarkhe committed on 30 Mar 2020
2020-03-25	0ab4964 Browse files » FVP: Add BL2 hash calculation in BL1 ... This patch provides support for measured boot by adding calculation of BL2 image hash in BL1 and writing these data in TB_FW_CONFIG DTB. Change-Id: Ic074a7ed19b14956719c271c805b35d147b7cec1 Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com> Alexei Fedorov committed on 25 Mar 2020
2020-03-17	0e75343 Browse files » Implement SMCCC_ARCH_SOC_ID SMC call ... Implemented SMCCC_ARCH_SOC_ID call in order to get below SOC information: 1. SOC revision 2. SOC version Implementation done using below SMCCC specification document: https://developer.arm.com/docs/den0028/c Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com> Change-Id: Ie0595f1c345a6429a6fb4a7f05534a0ca9c9a48b Manish V Badarkhe committed on 17 Mar 2020
2020-03-11	26d1e0c Browse files » fconf: necessary modifications to support fconf in BL31 & SP_MIN ... Necessary infrastructure added to integrate fconf framework in BL31 & SP_MIN. Created few populator() functions which parse HW_CONFIG device tree and registered them with fconf framework. Many of the changes are only applicable for fvp platform. This patch: 1. Adds necessary symbols and sections in BL31, SP_MIN linker script 2. Adds necessary memory map entry for translation in BL31, SP_MIN 3. Creates an abstraction layer for hardware configuration based on fconf framework 4. Adds necessary changes to build flow (makefiles) 5. Minimal callback to read hw_config dtb for capturing properties related to GIC(interrupt-controller node) 6. updates the fconf documentation Change-Id: Ib6292071f674ef093962b9e8ba0d322b7bf919af Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com> Madhukar Pappireddy committed on 11 Mar 2020
2020-03-10	f09852c Browse files » Merge changes from topic "sb/dualroot" into integration ... * changes: plat/arm: Pass cookie argument down to arm_get_rotpk_info() plat/arm: Add support for dualroot CoT plat/arm: Provide some PROTK files for development Mark Dykes authored on 10 Mar 2020 TrustedFirmware Code Review committed on 10 Mar 2020
2020-03-06	2be57b8 Browse files » TBB: Add an IO abstraction layer to load encrypted firmwares ... TBBR spec advocates for optional encryption of firmwares (see optional requirement: R060_TBBR_FUNCTION). So add an IO abstaction layer to support firmware decryption that can be stacked above any underlying IO/ packaging layer like FIP etc. It aims to provide a framework to load any encrypted IO payload. Also, add plat_get_enc_key_info() to be implemented in a platform specific manner as handling of encryption key may vary from one platform to another. Signed-off-by: Sumit Garg <sumit.garg@linaro.org> Change-Id: I9892e0ddf00ebecb8981301dbfa41ea23e078b03 Sumit Garg committed on 6 Mar 2020