LuminaSensum/arm-trusted-firmware

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LuminaSensum / arm-trusted-firmware

History for arm-trusted-firmware / drivers

2019-04-03	be3991c Browse files » Console: remove deprecated finish_console_register ... The old version of the macro is deprecated. Commit cc5859ca19ff ("Multi-console: Deprecate the `finish_console_register` macro") provides more details. Change-Id: I3d1cdf6496db7d8e6cfbb5804f508ff46ae7e67e Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com> Ambroise Vincent committed on 3 Apr 2019
2019-04-03	Unverified 682c307 Browse files » Merge pull request #1917 from marex/arm/master/v3meagle-v2.0.1 ... rcar_gen3: plat: Add R-Car V3M support Antonio Niño Díaz authored on 3 Apr 2019 GitHub committed on 3 Apr 2019
2019-04-02	b99f922 Browse files » meson/gxl: Add support for SHA256 DMA engine ... In order to configure and boot SCP, BL31 has to compute and send the SHA-256 of the firmware data via scpi. Luckily Amlogic GXL SOC has a DMA facility that could be used to offload SHA-256 computations. This adds basic support of this hardware SHA-256 engine. Signed-off-by: Remi Pommarel <repk@triplefau.lt> Remi Pommarel committed on 2 Apr 2019
2019-04-02	b709fe9 Browse files » rcar_gen3: plat: Add R-Car V3M support ... Add R-Car V3M support. This is based on the original V3M support patch for Yocto v2.23.1 by Vladimir Barinov. Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> --- Marek: Update on top of mainline ATF/master Valentine Barshak authored on 29 Oct 2018 Marek Vasut committed on 2 Apr 2019
2019-04-01	15652ec Browse files » rcar_gen3: drivers: qos: Add D3 QoS tables ... Add QoS tables for R-Car D3 SoC. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Marek Vasut committed on 1 Apr 2019
	b645d22 Browse files » rcar_gen3: drivers: pfc: Add D3 PFC tables ... Add PFC tables for R-Car D3 SoC. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Marek Vasut committed on 1 Apr 2019
	b60b9b5 Browse files » rcar_gen3: drivers: ddr_a: Add D3 DDR init ... Add R-Car D3 DDR initialization code. The code is in staging and needs cleanup, and possibly can even be merged with the E3 init code. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Marek Vasut committed on 1 Apr 2019
	cdea546 Browse files » rcar_gen3: drivers: swdt: Add D3 support ... Add WTCNT register configuration for the D3 SoC. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Marek Vasut committed on 1 Apr 2019
	ada6613 Browse files » rcar_gen3: drivers: scif: Add D3 support ... Add SCIF configuration specifics for the D3 SoC, that is detection of the D3 SoC and SCBRR configuration. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Marek Vasut committed on 1 Apr 2019
	5c1d535 Browse files » rcar_gen3: drivers: pwrc: Add D3 support ... The D3 SoC has one CPU core, just return 1 as a CPU number. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Marek Vasut committed on 1 Apr 2019
	90ff8ba Browse files » rcar_gen3: drivers: rom: Mark NEW table as D3 compatible ... Add comment into the ROM driver that the new table is also D3 compatible. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Marek Vasut committed on 1 Apr 2019
	bfbf5df Browse files » rcar_gen3: plat: Add initial D3 support ... Add R-Car D3 SoC platform specifics. Driver, PFC, QoS, DDR init code will be added separately. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Marek Vasut committed on 1 Apr 2019
	bde2836 Browse files » Remove several warnings reported with W=2 ... Improved support for W=2 compilation flag by solving some nested-extern and sign-compare warnings. The libraries are compiling with warnings (which turn into errors with the Werror flag). Outside of libraries, some warnings cannot be fixed. Change-Id: I06b1923857f2a6a50e93d62d0274915b268cef05 Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com> Ambroise Vincent committed on 1 Apr 2019
	609e053 Browse files » Remove several warnings reported with W=1 ... Improved support for W=1 compilation flag by solving missing-prototypes and old-style-definition warnings. The libraries are compiling with warnings (which turn into errors with the Werror flag). Outside of libraries, some warnings cannot be fixed without heavy structural changes. Change-Id: I1668cf99123ac4195c2a6a1d48945f7a64c67f16 Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com> Ambroise Vincent committed on 1 Apr 2019
2019-03-22	2baa727 Browse files » driver: synosys: Fix SD MMC not initializing correctly ... dw_params.mmc_dev_type should be assigned before mmc_init, otherwise SDMMC initialization will fail as the initialization treats the device as EMMC instead of SD. Signed-off-by: Tien Hock, Loh <tien.hock.loh@intel.com> Tien Hock, Loh committed on 22 Mar 2019
2019-03-13	Unverified b79239d Browse files » Merge pull request #1879 from pbeesley-arm/pb/todo-removal ... Pb/todo removal Soby Mathew authored on 13 Mar 2019 GitHub committed on 13 Mar 2019
	Unverified c61a807 Browse files » Merge pull request #1874 from hadi-asyrafi/qspi_boot ... intel: QSPI boot enablement Soby Mathew authored on 13 Mar 2019 GitHub committed on 13 Mar 2019
	Unverified 77913d4 Browse files » Merge pull request #1858 from thloh85-intel/dwmmc_fixes ... drivers: synopsys: Fix synopsys MMC driver Soby Mathew authored on 13 Mar 2019 GitHub committed on 13 Mar 2019
	Unverified eb9da9e Browse files » Merge pull request #1856 from masahisak/synquacer-scmi-support ... plat/synquacer: enable SCMI support Soby Mathew authored on 13 Mar 2019 GitHub committed on 13 Mar 2019
2019-03-12	f5ba408 Browse files » intel: QSPI boot enablement ... Manages QSPI initialization, configuration and IO handling as boot device Signed-off-by: Muhammad Hadi Asyrafi Abdul Halim <muhammad.hadi.asyrafi.abdul.halim@intel.com> Muhammad Hadi Asyrafi Abdul Halim committed on 12 Mar 2019
	b67d202 Browse files » plat/synquacer: enable SCMI support ... Enable the SCMI protocol support in SynQuacer platform. Aside from power domain, system power and apcore management protocol, this commit adds the vendor specific protocol(0x80). This vendor specific protocol is used to get the dram mapping information from SCP. Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org> Masahisa Kojima committed on 12 Mar 2019
	7d72181 Browse files » drivers: Remove TODO from io_fip.c ... The comment suggests checking version numbers and a checksum but there doesn't seem to be any usable data for either of these. For example, fip_toc_header_t doesn't contain any version information and neither does fip_toc_entry_t. As the function name "is_valid_header" suggests, this function is not concerned with checksumming any of the table of contents entries. Change-Id: I8673ae5dd37793771760169f26b2f55c15fbf587 Signed-off-by: Paul Beesley <paul.beesley@arm.com> Paul Beesley committed on 12 Mar 2019
	9a2fffb Browse files » drivers: Remove TODO from io_storage ... This TODO was added five years ago so I assume that there is not going to be a shutdown API added after all. Change-Id: If0f4e2066454df773bd9bf41ed65d3a10248a2d3 Signed-off-by: Paul Beesley <paul.beesley@arm.com> Paul Beesley committed on 12 Mar 2019
	3d0f30b Browse files » drivers: synopsys: Fix synopsys MMC driver ... There are some issues with synopsys MMC driver: - CMD8 should not expect data (for SD) - ACMD51 should expect data (Send SCR for SD) - dw_prepare should not dictate size to be MMC_BLOCK_SIZE, block size is now handled in the dw_prepare function - after the CMD completes, when doing dw_read, we need to invalidate cache and wait for the data transfer to complete - Need to set FIFO threshold, otherwise DMA might never get the interrupt to read or write Signed-off-by: Tien Hock, Loh <tien.hock.loh@intel.com> Tien Hock, Loh committed on 12 Mar 2019
2019-03-08	b248bb4 Browse files » mmc: stm32_sdmmc2: fill ocr_voltage ... STM32MP1 SDMMC device voltage is 3.3V. We should then precise the 2 ranges 3.2 to 3.3V and 3.3 to 3.4V in ocr_voltage field. Change-Id: I88e479f8f16bfe608a7808eace0df3fdec48deab Signed-off-by: Yann Gautier <yann.gautier@st.com> Yann Gautier committed on 8 Mar 2019
2019-03-08	Unverified 3c652a2 Browse files » Merge pull request #1863 from thloh85-intel/mmc_fixes ... drivers: mmc: Fix some issues with MMC stack Dimitris Papastamos authored on 8 Mar 2019 GitHub committed on 8 Mar 2019
2019-03-06	a468e75 Browse files » drivers: mmc: Fix some issues with MMC stack ... Some bugs in MMC stack needs to be fixed: - scr cannot be local as this will cause cache issue when invalidating after the read DMA transfer is completed - ACMD41 needs to send voltage information in initialization, otherwise the command is a query, thus will not initialize the controller - when checking device state, retry until the retries counter goes to zero before failing Signed-off-by: Tien Hock, Loh <tien.hock.loh@intel.com> Tien Hock, Loh committed on 6 Mar 2019
2019-03-05	Unverified f009c5f Browse files » Merge pull request #1847 from jts-arm/mbedtls ... Remove Mbed TLS dependency from plat_bl_common.c Antonio Niño Díaz authored on 5 Mar 2019 GitHub committed on 5 Mar 2019
2019-03-04	9b70cd5 Browse files » rcar_gen3: drivers: pfc: Configure GP5_09 as input on ULCB ... Configure the GPIO5 09 pin as input on the ULCB board by default, since the pin is routed on the expansion connector and not connected to anything by default. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Marek Vasut committed on 4 Mar 2019
2019-03-04	845d8fb Browse files » rcar_gen3: Add M3-W 3.0 support ... Add support for the M3W 3.0 SoC and synchronize the upstream ATF with Renesas downstream ATF release v2.0.1. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Marek Vasut committed on 4 Mar 2019