2014-08-04 |
Merge pull request #179 from jcastillo-arm/jc/tf-issues/219
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Call platform_is_primary_cpu() only from reset handler
danh-arm
committed
on 4 Aug 2014
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2014-08-01 |
Support asynchronous method for BL3-2 initialization
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This patch adds support for BL3-2 initialization by asynchronous
method where BL3-1 transfers control to BL3-2 using world switch.
After BL3-2 initialization, it transfers control to BL3-3 via SPD
service handler. The SPD service handler initializes the CPU context
to BL3-3 entrypoint depending on the return function indentifier from
TSP initialization.
Fixes ARM-software/TF-issues#184
Change-Id: I7b135c2ceeb356d3bb5b6a287932e96ac67c7a34
Vikram Kanigiri
committed
on 1 Aug 2014
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Call platform_is_primary_cpu() only from reset handler
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The purpose of platform_is_primary_cpu() is to determine after reset
(BL1 or BL3-1 with reset handler) if the current CPU must follow the
cold boot path (primary CPU), or wait in a safe state (secondary CPU)
until the primary CPU has finished the system initialization.
This patch removes redundant calls to platform_is_primary_cpu() in
subsequent bootloader entrypoints since the reset handler already
guarantees that code is executed exclusively on the primary CPU.
Additionally, this patch removes the weak definition of
platform_is_primary_cpu(), so the implementation of this function
becomes mandatory. Removing the weak symbol avoids other
bootloaders accidentally picking up an invalid definition in case the
porting layer makes the real function available only to BL1.
The define PRIMARY_CPU is no longer mandatory in the platform porting
because platform_is_primary_cpu() hides the implementation details
(for instance, there may be platforms that report the primary CPU in
a system register). The primary CPU definition in FVP has been moved
to fvp_def.h.
The porting guide has been updated accordingly.
Fixes ARM-software/tf-issues#219
Change-Id: If675a1de8e8d25122b7fef147cb238d939f90b5e
Juan Castillo
committed
on 1 Aug 2014
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2014-07-28 |
Merge pull request #172 from soby-mathew/sm/asm_assert
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Introduce asm assert and optimize crash reporting
danh-arm
committed
on 28 Jul 2014
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Add CPUECTLR_EL1 and Snoop Control register to crash reporting
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This patch adds the CPUECTLR_EL1 register and the CCI Snoop Control
register to the list of registers being reported when an unhandled
exception occurs.
Change-Id: I2d997f2d6ef3d7fa1fad5efe3364dc9058f9f22c
Soby Mathew
committed
on 28 Jul 2014
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Implement an assert() callable from assembly code
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The patch implements a macro ASM_ASSERT() which can
be invoked from assembly code. When assertion happens,
file name and line number of the check is written
to the crash console.
Fixes ARM-software/tf-issues#95
Change-Id: I6f905a068e1c0fa4f746d723f18df60daaa00a86
Soby Mathew
committed
on 28 Jul 2014
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Introduce crash console APIs for crash reporting
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This patch introduces platform APIs to initialise and
print a character on a designated crash console.
For the FVP platform, PL011_UART0 is the designated
crash console. The platform porting guide is also updated
to document the new APIs.
Change-Id: I5e97d8762082e0c88c8c9bbb479353eac8f11a66
Soby Mathew
committed
on 28 Jul 2014
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Remove the concept of coherent stacks
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This patch removes the allocation of memory for coherent stacks, associated
accessor function and some dead code which called the accessor function. It also
updates the porting guide to remove the concept and the motivation behind using
stacks allocated in coherent memory.
Fixes ARM-software/tf-issues#198
Change-Id: I00ff9a04f693a03df3627ba39727e3497263fc38
Achin Gupta
committed
on 28 Jul 2014
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2014-07-11 |
Merge pull request #164 from sandrine-bailleux/sb/bl30-support-v2
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Add support for BL3-0 image (v2)
danh-arm
committed
on 11 Jul 2014
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Merge pull request #163 from sandrine-bailleux/sb/tf-issue-117-v2
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fvp: Reuse BL1 and BL2 memory through image overlaying (v2)
danh-arm
committed
on 11 Jul 2014
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Update the documentation about the memory layout on FVP
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Update the "Memory layout on FVP platforms" section in the Firmware
Design document to reflect the overlaying of BL1 and BL2 images
by BL3-1 and BL3-2.
Also update the Porting Guide document to mention the
BL31_PROGBITS_LIMIT and BL32_PROGBITS_LIMIT constants.
Change-Id: I0b23dae5b5b4490a01be7ff7aa80567cff34bda8
Sandrine Bailleux
committed
on 11 Jul 2014
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2014-07-10 |
Add support for BL3-0 image
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- Add support for loading a BL3-0 image in BL2. Information about
memory extents is populated by platform-specific code. Subsequent
handling of BL3-0 is also platform specific.
The BL2 main function has been broken down to improve readability.
The BL3-2 image is now loaded before the BL3-3 image to align with
the boot flow.
- Build system: Add support for specifying a BL3-0 image that will be
included into the FIP image.
- IO FIP driver: Add support for identifying a BL3-0 image inside a
FIP image.
- Update the documentation to reflect the above changes.
Change-Id: I067c184afd52ccaa86569f13664757570c86fc48
Sandrine Bailleux
committed
on 10 Jul 2014
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Merge pull request #157 from sandrine-bailleux/sb/tf-issue-109
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TF issue 109
danh-arm
committed
on 10 Jul 2014
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2014-07-09 |
Refactor fvp gic code to be a generic driver
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Refactor the FVP gic code in plat/fvp/fvp_gic.c to be a generic ARM
GIC driver in drivers/arm/gic/arm_gic.c. Provide the platform
specific inputs in the arm_gic_setup() function so that the driver
has no explicit dependency on platform code.
Provide weak implementations of the platform interrupt controller
API in a new file, plat/common/plat_gic.c. These simply call through
to the ARM GIC driver.
Move the only remaining FVP GIC function, fvp_gic_init() to
plat/fvp/aarch64/fvp_common.c and remove plat/fvp/fvp_gic.c
Fixes ARM-software/tf-issues#182
Change-Id: Iea82fe095fad62dd33ba9efbddd48c57717edd21
Dan Handley
committed
on 9 Jul 2014
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2014-07-01 |
Remove concept of top/bottom image loading
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This concept is no longer required since we now support loading of
images at fixed addresses only.
The image loader now automatically detects the position of the image
inside the current memory layout and updates the layout such that
memory fragmentation is minimised.
The 'attr' field of the meminfo data structure, which used to hold
the bottom/top loading information, has been removed. Also the 'next'
field has been removed as it wasn't used anywhere.
The 'init_bl2_mem_layout()' function has been moved out of common
code and put in BL1-specific code. It has also been renamed into
'bl1_init_bl2_mem_layout'.
Fixes ARM-software/tf-issues#109
Change-Id: I3f54642ce7b763d5ee3b047ad0ab59eabbcf916d
Sandrine Bailleux
committed
on 1 Jul 2014
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2014-06-23 |
Correctly dimension the PSCI aff_map_node array
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The array of affinity nodes is currently allocated for 32 entries
with the PSCI_NUM_AFFS value defined in psci.h. This is not enough
for large systems, and will substantially over allocate the array
for small systems.
This patch introduces an optional platform definition
PLATFORM_NUM_AFFS to platform_def.h. If defined this value is
used for PSCI_NUM_AFFS, otherwise a value of two times the number
of CPU cores is used.
The FVP port defines PLATFORM_NUM_AFFS to be 10 which saves
nearly 1.5KB of memory.
Fixes ARM-software/tf-issues#192
Change-Id: I68e30ac950de88cfbd02982ba882a18fb69c1445
Andrew Thoelke
committed
on 23 Jun 2014
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2014-06-11 |
Make the BL3-1 crash reporting optional
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This patch makes the console crash dump of processor register
state optional based on the CRASH_REPORTING make variable.
This defaults to only being enabled for DEBUG builds. This can
be overridden by setting a different value in the platform
makefile or on the make command line.
Change-Id: Icfa1b2d7ff0145cf0a85e8ad732f9cee7e7e993f
Andrew Thoelke
committed
on 11 Jun 2014
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2014-06-03 |
Merge pull request #122 from 'danh-arm:dh/v0.4-docs'
Dan Handley
committed
on 3 Jun 2014
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Document design of the Interrupt Mangement Framework
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This patch adds documentation that describes the design of the Interrupt
management framework in the ARM Trusted Firmware. The porting-guide.md has also
been updated to describe the interface that should be implemented by each
platform to support this framework.
Change-Id: I3eda48e5c9456e6a9516956bee16a29e366633b7
Co-Authored-By: Soby Mathew <soby.mathew@arm.com>
Achin Gupta
authored
on 2 Jun 2014
Dan Handley
committed
on 3 Jun 2014
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Merge pull request #119 from 'soby-mathew:sm/doc_crash_reporting'
Dan Handley
committed
on 3 Jun 2014
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Merge pull request #117 from 'danh-arm:dh/v0.4-user-guide'
Dan Handley
committed
on 3 Jun 2014
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Merge pull request #121 'vikramkanigiri:vk/doc_for_133'
Dan Handley
committed
on 3 Jun 2014
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Documentation for BL3-1 hardening and reset vector
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Update documentation with BL3-1 hardening interface
changes and for using BL3-1 as a reset vector feature
Change-Id: Iafdd05e7a8e66503409f2acc934372efef5bc51b
Vikram Kanigiri
committed
on 3 Jun 2014
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Trusted Firmware v0.4 release documentation
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Updates to readme.md and change-log.md to describe the features and changes in
the v0.4 release.
Change-Id: Ice0a7cf7abae349f552e662eac638a46acc5db3f
Dan Handley
committed
on 3 Jun 2014
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User guide updates for v0.4 release
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Update the Linux kernel, Linaro file system, FVP and DS-5 versions used for the
v0.4 release in user-guide.md.
Change-Id: I2265fc17c229d4b8cc52165d6583a4a579cdcee3
Dan Handley
committed
on 3 Jun 2014
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2014-06-02 |
Documentation for the new crash reporting implementation
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This patch modifies and adds to the existing documentation
for the crash reporting implementation in BL3-1.
Change-Id: I2cfbfeeeb64996ec7d19a9ddf95295482899b4bd
Soby Mathew
committed
on 2 Jun 2014
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2014-05-30 |
Fix porting guide references to platform.h
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Following recent refactoring changes to platform.h, this commit updates
porting-guide.md to correctly refer to platform.h and platform_def.h where
appropriate.
Change-Id: Idf1e77503c24358696f8f3c14caa0cc1d579deb4
Dan Handley
committed
on 30 May 2014
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2014-05-23 |
Merge pull request #101 from sandrine-bailleux:sb/tf-issue-81-v2
Andrew Thoelke
committed
on 23 May 2014
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doc: Update information about the memory layout
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Rework the "Memory layout on FVP platforms" section in the Firmware
Design document. Add information about where the TSP image fits
in the memory layout when present.
Add documentation for the base addresses of each bootloader image
in the porting guide.
Change-Id: I4afb2605e008a1cb28c44a697804f2cb6bb4c9aa
Sandrine Bailleux
committed
on 23 May 2014
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Merge pull request #102 from achingupta:ag/tf-issues#104-v2
Andrew Thoelke
committed
on 23 May 2014
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