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History for arm-trusted-firmware / drivers / renesas / rcar

2019-03-04	845d8fb Browse files » rcar_gen3: Add M3-W 3.0 support ... Add support for the M3W 3.0 SoC and synchronize the upstream ATF with Renesas downstream ATF release v2.0.1. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Marek Vasut committed on 4 Mar 2019
2019-01-29	458a449 Browse files » rcar_gen3: drivers: cpld: fix power-off on reset ... Method cpld_reset_cpu of bl31 is called from the Linux kernel and uses GPIO6, GPIO2 pins as SPI bus lines to control the CPLD device. But in the kernel GPIO6_8 pin are initialized to work in interrupt mode instead of the input/output mode. This leads to the fact that the SPI bus becomes non-functional. In this patch we switch the GPIO6_8 pin back to the input-output mode. Signed-off-by: Sergii Boryshchenko <sergii.boryshchenko@globallogic.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Sergii Boryshchenko authored on 30 Nov 2017 Marek Vasut committed on 29 Jan 2019
2019-01-29	47366cb Browse files » rcar_gen3: plat: Add missing cpu_on_check() implementation ... The ATF code fails to build with PMIC_ROHM_BD9571=0, add the missing function into the PWRC code. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Marek Vasut committed on 29 Jan 2019
2019-01-08	ca031df Browse files » rcar_gen3: drivers: pwrc: Switch to common delay implementation ... Replace the ad-hoc implementation of delay in PWRC driver with common R-Car delay code. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Marek Vasut committed on 8 Jan 2019
	c97c5b5 Browse files » rcar_gen3: drivers: delay: Rewrite from assembler to C ... Rewrite the delay code from assembler to C. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Marek Vasut committed on 8 Jan 2019
	452031e Browse files » rcar_gen3: drivers: scif: Use TEND flag for transmission end detection ... Use the SCIF SCFSR:TEND bit to check that all data were transmitted by the SCIF and that there are no more valid data to transmit in the FIFO. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Marek Vasut committed on 8 Jan 2019
	bd57db5 Browse files » rcar_gen3: drivers: cpld: Move rcar_cpld_reset_cpu() into header ... Move the rcar_cpld_reset_cpu() function into header file and zap the externs. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Marek Vasut committed on 8 Jan 2019
	8cbc417 Browse files » rcar_gen3: drivers: swdt: Access SCR in EL3 ... The code runs in EL3, use EL3 accessors to manipulate the interrupt bit. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Marek Vasut committed on 8 Jan 2019
	dc03e84 Browse files » rcar_gen3: drivers: auth-mod: Access SCTLR in EL3 ... The code runs in EL3, use EL3 accessors to manipulate the cache bits. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Marek Vasut committed on 8 Jan 2019
	b51a773 Browse files » rcar_gen3: plat: Clean up rcar_pwrc_code_copy_to_system_ram() ... Call the function only from architecture setup and at the end of suspend cycle instead of calling it all over the place. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Marek Vasut committed on 8 Jan 2019
2019-01-04	09d40e0 Browse files » Sanitise includes across codebase ... Enforce full include path for includes. Deprecate old paths. The following folders inside include/lib have been left unchanged: - include/lib/cpus/${ARCH} - include/lib/el3_runtime/${ARCH} The reason for this change is that having a global namespace for includes isn't a good idea. It defeats one of the advantages of having folders and it introduces problems that are sometimes subtle (because you may not know the header you are actually including if there are two of them). For example, this patch had to be created because two headers were called the same way: e0ea0928d5b7 ("Fix gpio includes of mt8173 platform to avoid collision."). More recently, this patch has had similar problems: 46f9b2c3a282 ("drivers: add tzc380 support"). This problem was introduced in commit 4ecca33988b9 ("Move include and source files to logical locations"). At that time, there weren't too many headers so it wasn't a real issue. However, time has shown that this creates problems. Platforms that want to preserve the way they include headers may add the removed paths to PLAT_INCLUDES, but this is discouraged. Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Antonio Nino Diaz committed on 4 Jan 2019
2018-11-08	c3cf06f Browse files » Standardise header guards across codebase ... All identifiers, regardless of use, that start with two underscores are reserved. This means they can't be used in header guards. The style that this project is now to use the full name of the file in capital letters followed by 'H'. For example, for a file called "uart_example.h", the header guard is UART_EXAMPLE_H. The exceptions are files that are imported from other projects: - CryptoCell driver - dt-bindings folders - zlib headers Change-Id: I50561bf6c88b491ec440d0c8385c74650f3c106e Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Antonio Nino Diaz committed on 8 Nov 2018
2018-11-06	04d1f8d Browse files » rcar_gen3: E3 target: fix compilation issues ... Target builds but has not been tested. Signed-off-by: ldts <jorge.ramirez.ortiz@gmail.com> ldts committed on 6 Nov 2018
2018-10-17	84433c5 Browse files » rcar_gen3: drivers: watchdog ... Signed-off-by: ldts <jramirez@baylibre.com> Jorge Ramirez-Ortiz authored on 23 Sep 2018 ldts committed on 17 Oct 2018
	33947f2 Browse files » rcar_gen3: drivers: serial controller interface ... Signed-off-by: ldts <jramirez@baylibre.com> Jorge Ramirez-Ortiz authored on 23 Sep 2018 ldts committed on 17 Oct 2018
	b3bd073 Browse files » rcar_gen3: drivers: spi multio bus controller ... Signed-off-by: ldts <jramirez@baylibre.com> Jorge Ramirez-Ortiz authored on 23 Sep 2018 ldts committed on 17 Oct 2018
	0709efb Browse files » rcar_gen3: drivers: rom api ... Signed-off-by: ldts <jramirez@baylibre.com> Jorge Ramirez-Ortiz authored on 23 Sep 2018 ldts committed on 17 Oct 2018
	32c70e4 Browse files » rcar_gen3: drivers: power controller ... Signed-off-by: ldts <jramirez@baylibre.com> Jorge Ramirez-Ortiz authored on 23 Sep 2018 ldts committed on 17 Oct 2018
	0a106e2 Browse files » rcar_gen3: drivers: console ... Signed-off-by: ldts <jramirez@baylibre.com> Jorge Ramirez-Ortiz authored on 23 Sep 2018 ldts committed on 17 Oct 2018
	c2f2868 Browse files » rcar_gen3: drivers: io [emmc/mem] ... Signed-off-by: ldts <jramirez@baylibre.com> Jorge Ramirez-Ortiz authored on 23 Sep 2018 ldts committed on 17 Oct 2018
	da963e3 Browse files » rcar_gen3: drivers: i2c dvfs ... Signed-off-by: ldts <jramirez@baylibre.com> Jorge Ramirez-Ortiz authored on 23 Sep 2018 ldts committed on 17 Oct 2018
	3bfe202 Browse files » rcar_gen3: drivers: emmc ... Signed-off-by: ldts <jramirez@baylibre.com> Jorge Ramirez-Ortiz authored on 23 Sep 2018 ldts committed on 17 Oct 2018
	2f7de72 Browse files » rcar_gen3: drivers: dma ... Signed-off-by: ldts <jramirez@baylibre.com> Jorge Ramirez-Ortiz authored on 23 Sep 2018 ldts committed on 17 Oct 2018
	d427fc9 Browse files » rcar_gen3: drivers: micro delay generator ... Signed-off-by: ldts <jramirez@baylibre.com> Jorge Ramirez-Ortiz authored on 23 Sep 2018 ldts committed on 17 Oct 2018
	3a81abb Browse files » rcar_gen3: drivers: cpld ... Signed-off-by: ldts <jramirez@baylibre.com> Jorge Ramirez-Ortiz authored on 23 Sep 2018 ldts committed on 17 Oct 2018
	070b0f0 Browse files » rcar_gen3: drivers: board identification ... Signed-off-by: ldts <jramirez@baylibre.com> Jorge Ramirez-Ortiz authored on 23 Sep 2018 ldts committed on 17 Oct 2018
	0cdb86d Browse files » rcar_gen3: drivers: avs [adaptive voltage scaling] ... Signed-off-by: ldts <jramirez@baylibre.com> Jorge Ramirez-Ortiz authored on 23 Sep 2018 ldts committed on 17 Oct 2018
	2f473cc Browse files » rcar_gen3: drivers: authentication ... Signed-off-by: ldts <jramirez@baylibre.com> Jorge Ramirez-Ortiz authored on 23 Sep 2018 ldts committed on 17 Oct 2018
	7e532c4 Browse files » rcar-gen3: initial commit for the rcar-gen3 boards ... Reference code: ============== rar_gen3: IPL and Secure Monitor Rev1.0.22 https://github.com/renesas-rcar/arm-trusted-firmware [rcar_gen3] Author: Takuya Sakata <takuya.sakata.wz@bp.renesas.com> Date: Thu Aug 30 21:26:41 2018 +0900 Update IPL and Secure Monitor Rev1.0.22 General Information: =================== This port has been tested on the Salvator-X Soc_id r8a7795 revision ES1.1 (uses an SPD). Build Tested: ------------- ATFW_OPT="LSI=H3 RCAR_DRAM_SPLIT=1 RCAR_LOSSY_ENABLE=1" MBEDTLS_DIR=$mbedtls $ make clean bl2 bl31 rcar PLAT=rcar ${ATFW_OPT} SPD=opteed Other dependencies: ------------------ * mbed_tls: git@github.com:ARMmbed/mbedtls.git [devel] Merge: 68dbc94 f34a4c1 Author: Simon Butcher <simon.butcher@arm.com> Date: Thu Aug 30 00:57:28 2018 +0100 * optee_os: https://github.com/BayLibre/optee_os Until it gets merged into OP-TEE, the port requires Renesas' Trusted Environment with a modification to support power management. Author: Jorge Ramirez-Ortiz <jramirez@baylibre.com> Date: Thu Aug 30 16:49:49 2018 +0200 plat-rcar: cpu-suspend: handle the power level Signed-off-by: Jorge Ramirez-Ortiz <jramirez@baylibre.com> * u-boot: The port has beent tested using mainline uboot. Author: Fabio Estevam <festevam@gmail.com> Date: Tue Sep 4 10:23:12 2018 -0300 linux: The port has beent tested using mainline kernel. Author: Linus Torvalds <torvalds@linux-foundation.org> Date: Sun Sep 16 11:52:37 2018 -0700 Linux 4.19-rc4 Overview --------- BOOTROM starts the cpu at EL3; In this port BL2 will therefore be entered at this exception level (the Renesas' ATF reference tree [1] resets into EL1 before entering BL2 - see its bl2.ld.S) BL2 initializes DDR (and i2c to talk to the PMIC on some platforms) before determining the boot reason (cold or warm). During suspend all CPUs are switched off and the DDR is put in backup mode (some kind of self-refresh mode). This means that BL2 is always entered in a cold boot scenario. Once BL2 boots, it determines the boot reason, writes it to shared memory (BOOT_KIND_BASE) together with the BL31 parameters (PARAMS_BASE) and jumps to BL31. To all effects, BL31 is as if it is being entered in reset mode since it still needs to initialize the rest of the cores; this is the reason behind using direct shared memory access to BOOT_KIND_BASE and PARAMS_BASE instead of using registers to get to those locations (see el3_common_macros.S and bl31_entrypoint.S for the RESET_TO_BL31 use case). Depending on the boot reason BL31 initializes the rest of the cores: in case of suspend, it uses a MBOX memory region to recover the program counters. [1] https://github.com/renesas-rcar/arm-trusted-firmware Tests ----- cpuidle ------- enable kernel's cpuidle arm_idle driver and boot * system suspend -------------- $ cat suspend.sh #!/bin/bash i2cset -f -y 7 0x30 0x20 0x0F read -p "Switch off SW23 and press return " foo echo mem > /sys/power/state * cpu hotplug: ------------ $ cat offline.sh #!/bin/bash nbr=$1 echo 0 > /sys/devices/system/cpu/cpu$nbr/online printf "ONLINE: " && cat /sys/devices/system/cpu/online printf "OFFLINE: " && cat /sys/devices/system/cpu/offline $ cat online.sh #!/bin/bash nbr=$1 echo 1 > /sys/devices/system/cpu/cpu$nbr/online printf "ONLINE: " && cat /sys/devices/system/cpu/online printf "OFFLINE: " && cat /sys/devices/system/cpu/offline Signed-off-by: ldts <jramirez@baylibre.com> Jorge Ramirez-Ortiz authored on 23 Sep 2018 ldts committed on 17 Oct 2018