| 2018-06-21 |
synquacer: Add MHU driver
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Add Message Handling Unit (MHU) driver used to communicate among
Application Processors (AP) and System Control Processor (SCP).
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Sumit Garg
committed
on 21 Jun 2018
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synquacer: Enable MMU using xlat_tables_v2 library
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BL31 runs from SRAM which is a non-coherent memory on synquacer. So
enable MMU with SRAM memory marked as Non-Cacheable and mark page tables
kept on SRAM as Non-Cacheable via XLAT_TABLE_NC flag. Also add page tables
for Device address space.
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Sumit Garg
committed
on 21 Jun 2018
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synquacer: Enable System level Generic timer
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Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Sumit Garg
committed
on 21 Jun 2018
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synquacer: Enable GICv3 support
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synquacer uses GICv3 compliant GIC500. So enable proper GICv3 driver
initialization.
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Sumit Garg
committed
on 21 Jun 2018
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synquacer: Enable CCN driver support
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synquacer has CCN-512 interconnect. So enable proper CCN driver
initialization.
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Sumit Garg
committed
on 21 Jun 2018
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synquacer: Implement topology functions
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These functions describe the layout of the cores and clusters in order
to support the PSCI framework.
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Sumit Garg
committed
on 21 Jun 2018
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synquacer: Populate BL32 and BL33 entrypoints
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As this platform supports direct entry to BL31 and no BL2, so
populate BL32 and BL33 entrypoints with static memory load info.
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Sumit Garg
committed
on 21 Jun 2018
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synquacer: Enable PL011 UART Console
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Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Sumit Garg
committed
on 21 Jun 2018
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synquacer: Add platform core management helpers
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Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Sumit Garg
committed
on 21 Jun 2018
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synquacer: Introduce basic platform support
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synquacer supports direct entry to BL31 without BL1 and BL2 as
SCP firmware does similar work. So this patch adds BL31 stub APIs.
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Sumit Garg
committed
on 21 Jun 2018
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| 2018-06-11 |
uniphier: fix CCI-500 connection for LD20
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The slave ports of LD20 CCI-500 are connected as follows:
S0: CA53
S1: CA72
Be careful because the slave interface is not arranged in the
cluster number order (CA72: cluster 0, CA53: cluster 1).
Root-caused-by: Tetsuya Yoshizaki <yoshizaki.tetsuya@socionext.com>
Signed-off-by: Satoshi Ikawa <ikawa.satoshi@socionext.com>
Satoshi Ikawa
authored
on 11 Jun 2018
Masahiro Yamada
committed
on 11 Jun 2018
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| 2018-03-26 |
plat: fix switch statements to comply with MISRA rules
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Ensure (where possible) that switch statements in plat comply with MISRA
rules 16.1 - 16.7.
Change-Id: Ie4a7d2fd10f6141c0cfb89317ea28a755391622f
Signed-off-by: Jonathan Wright <jonathan.wright@arm.com>
Jonathan Wright
committed
on 26 Mar 2018
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| 2018-02-06 |
Merge pull request #1224 from masahir0y/gzip
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Support GZIP-compressed images for faster loading and verification
davidcunado-arm
authored
on 6 Feb 2018
GitHub
committed
on 6 Feb 2018
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| 2018-02-02 |
uniphier: add ULL to physical address literals
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Looks like this is requirement in the pre-merge static analysis.
misra_violation: [Required] MISRA C-2012 Rule 7.2 violation:
Unsigned constants must be declared with U or u suffix.
Adding ULL as requested. I used ULL() macros for BL*_{BASE,LIMIT}
because they are referenced from linker scripts.
Requested-by: David Cunado <david.cunado@arm.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada
committed
on 2 Feb 2018
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uniphier: allocate xlat region of on-chip SRAM only when needed
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Currently, the xlat region of the on-chip SRAM is always allocated
for all BL images.
The access to the on-chip SRAM is necessary for loading images from
a USB memory device (i.e. when updating firmware), so unneeded for
the usual boot procedure.
To avoid this waste, allocate the xlat region dynamically only for
BL2, and only when it is necessary.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada
committed
on 2 Feb 2018
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uniphier: get back original BL31/32 location used before BL2-AT-EL3
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Commit 247fc0435191 ("uniphier: switch to BL2-AT-EL3 and remove BL1
support") accidentally changed the location of BL31 and BL32. The
new memory map overlaps with the audio DSP images, also gives impact
to OP-TEE. They are both out of control of ARM Trusted Firmware, so
not easy to change. This commit restores the image layout that was
originally used prior to the BL2-AT-EL3 migration.
Reported-by: Katsuhiro Suzuki <suzuki.katsuhiro@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada
committed
on 2 Feb 2018
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| 2018-02-01 |
uniphier: support GZIP-compressed images
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Allow to handle GZIP-compressed images by giving FIP_GZIP=1 from the
command line.
- Images are GZIP-compressed, then packed into FIP. If Trusted Board
Boot is enabled, certificates are generated based on the compressed
images.
- GZIP decompressor is linked into BL2 to decompress images at
run-time.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada
committed
on 1 Feb 2018
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uniphier: add a helper to get image_info
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In the next commit, I will have more usecases to get struct image_info
from image ID. It is better to make a helper function at a different
layer. I do not need the current uniphier_image_descs_fixup() since
the code is small enough to be squashed into the caller side.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada
committed
on 1 Feb 2018
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| 2018-01-24 |
uniphier: switch to BL2-AT-EL3 and remove BL1 support
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UniPhier platform implements non-TF boot ROM. Prior to the BL2-AT-EL3
support, BL1 (worked as a pseudo ROM) was needed just for ensuring BL2
is entered at EL1-S. Now, this platform is able to avoid this waste.
Enable the BL2_AT_EL3 option, and remove BL1.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada
committed
on 24 Jan 2018
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uniphier: set PROGRAMMABLE_RESET_ADDRESS to disable warm boot mailbox
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The warm boot mailbox code is compiled if PROGRAMMABLE_RESET_ADDRESS
is disabled.
The warm boot mailbox is useless for UniPhier SoC family because BL1
is not the first image. The UniPhier platform implements non-TF ROM,
then BL1 works as a pseudo ROM, so it is never executed in the warm
boot.
The reset vector address is not actually programmable for UniPhier
platform, but it should not hurt to enable PROGRAMMABLE_RESET_ADDRESS
to disable the mailbox and remove pointless plat_get_my_entrypoint.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada
committed
on 24 Jan 2018
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| 2018-01-22 |
Allow API deprecation for uniphier platform
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The `override ERROR_DEPRECATION = 1` setting in uniphier platform
makes deprecation of API difficult. Hence removing the same. This
flag should be specified on the command line if needed.
Change-Id: I8c82d8d13944e450a8cd636de3326137c04d7560
Signed-off-by: Soby Mathew <soby.mathew@arm.com>
Soby Mathew
committed
on 22 Jan 2018
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| 2018-01-03 |
uniphier: simplify GZIP compress rule
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It is not necessary to read data from stdin. The input file name
is ripped off by -n option, anyway. I still use the redirect for
the output to specify the output file name.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada
committed
on 3 Jan 2018
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| 2017-12-19 |
uniphier: fix alignment of build log
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The build log should be indented with two spaces for correct alignment.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada
committed
on 19 Dec 2017
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uniphier: fix base address of IO block buffer
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The current IO block buffer overlaps with BL2 image location.
So, BL2 may corrupt itself.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada
committed
on 19 Dec 2017
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| 2017-11-30 |
Do not enable SVE on pre-v8.2 platforms
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Pre-v8.2 platforms such as the Juno platform does not have
the Scalable Vector Extensions implemented and so the build
option ENABLE_SVE is set to zero.
This has a minor performance improvement with no functional
impact.
Change-Id: Ib072735db7a0247406f8b60e325b7e28b1e04ad1
Signed-off-by: David Cunado <david.cunado@arm.com>
David Cunado
committed
on 30 Nov 2017
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| 2017-11-06 |
uniphier: make sure to create build directory before ROT key
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Building the UniPhier platform in parallel with TRUSTED_BOARD_BOOT=1
could fail due to non-existing directory. It might be difficult to
reproduce, but here is an easier way to trigger the problem:
$ make PLAT=uniphier TRUSTED_BOARD_BOOT=1 MBEDTLS_DIR=mbedtls certificates
OPENSSL build/uniphier/release/rot_key.pem
/bin/sh: 1: cannot create build/uniphier/release/rot_key.pem: Directory nonexistent
make: *** [build/uniphier/release/rot_key.pem] Error 2
The $(ROT_KEY) must depend on $(BUILD_PLAT) so that the build directory
is created before the key.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada
committed
on 6 Nov 2017
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| 2017-10-21 |
Merge pull request #1131 from jeenu-arm/gic-migrate
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Migrate upstream platforms to using interrupt properties
davidcunado-arm
authored
on 21 Oct 2017
GitHub
committed
on 21 Oct 2017
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| 2017-10-18 |
uniphier: move ROTPK hash to .rodata section
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This is not executable code. It should be put into .rodata instead
of .text section.
This produces more correct BL1 image when SEPARATE_CODE_AND_RODATA is
defined.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada
committed
on 18 Oct 2017
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| 2017-10-16 |
uniphier: Migrate to using interrupt properties
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Change-Id: I795ec540942130b5ddc0fa1fd7167f7e1d1ae967
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
Jeenu Viswambharan
committed
on 16 Oct 2017
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| 2017-09-27 |
Uniphier: fix xlat tables lib inclusion
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Uses the xlat tables library's Makefile instead of directly including
the source files in the Uniphier platform port.
Change-Id: I27294dd71bbf9bf3e82973c75324652b037e5bce
Signed-off-by: Douglas Raillard <douglas.raillard@arm.com>
Douglas Raillard
committed
on 27 Sep 2017
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