2019-07-01 |
Fix the License header template in imx_aipstz.c
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Signed-off-by: Soby Mathew <soby.mathew@arm.com>
Change-Id: I2281b3c1b8a0f2caa751c746b7835f998183e0af
Soby Mathew
committed
on 1 Jul 2019
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2019-06-28 |
warp7: remove old console from makefile
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Change-Id: I87818b220568cc34838726b32ddf29ee6cf31ed7
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
Ambroise Vincent
committed
on 28 Jun 2019
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Remove MULTI_CONSOLE_API flag and references to it
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The new API becomes the default one.
Change-Id: Ic1d602da3dff4f4ebbcc158b885295c902a24fec
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
Ambroise Vincent
committed
on 28 Jun 2019
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2019-05-28 |
Merge "plat: imx8m: Add the aipstz init to config peripheral access" into integration
Soby Mathew
authored
on 28 May 2019
TrustedFirmware Code Review
committed
on 28 May 2019
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2019-05-21 |
plat: imx8m: Add the aipstz init to config peripheral access
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AIPSTZ provide access control for all the peripherals connected
to it. In this patch all the perperals are configured accessible
to all the master. it can be customized based the actual use
case.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I5ef5baa1da6906f13a60923d27ede336c61e319a
Jacky Bai
committed
on 21 May 2019
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2019-05-20 |
imx8: Replace PLAT_IMX8* with automatic PLAT_imx8*
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Platform defines are already provided by the build system so let's not
duplicate them.
Change-Id: Icf1ea76c3c3213e27b447c95e2b22b961fa7693e
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Leonard Crestez
committed
on 20 May 2019
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plat: imx8mq: Implement IMX_SIP_GET_SOC_INFO
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The manual documents that 0x3036006c should contains the soc revision
for imx8mq but this always reports A0. Work around this by parsing the
ROM header and checking if OCOTP register 0x40 is stuck at 0xff0055aa.
Determining this inside TF-A makes life easier for OS, see for example
this linux discussion: https://lkml.org/lkml/2019/5/3/465
The soc revision can also be useful inside TF-A itself, for example for
the non-upstream DDR DVFS "busfreq" feature is affected by 8mq erratas.
The clock for OCOTP block can be disabled by OS so only initialize soc
revision once at boot time.
Change-Id: I9ca3f27840229ce8a28b53870e44da29f63c73aa
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Leonard Crestez
committed
on 20 May 2019
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2019-05-13 |
plat: imx8mq: Remove duplicated linker symbols
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Remove duplicated linker symbols, resue the symbols
defined in bl_common.h
Change-Id: I10de450eccc78c09b61a8ae7126bf4f4029fa682
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Jacky Bai
committed
on 13 May 2019
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2019-05-09 |
plat: imx8m: Implement IMX_SIP_BUILDINFO
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The IMX_SIP_BUILDINFO call was implemented for imx8qm and imx8qx but
it's also applicable to imx8m.
This fixes U-Boot not printing commit hash on 8m with upstream TF-A.
Change-Id: Idcfd9729eaaccf329c24e241da325f1f6cd3c880
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Leonard Crestez
committed
on 9 May 2019
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2019-05-08 |
plat: imx8mq: Only keep IRQ 32 unmasked
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Only IRQ 32 (SPI 0) needs to be kept unmasked, not everything divisible
by 32.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Change-Id: I286b925eead89218cfeddd82f53a634f3447d212
Leonard Crestez
committed
on 8 May 2019
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plat: imx8mq: gpc: Enable all power domain by default
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This is similar to imx8mm and allows uboot to run fastboot over USB otg.
There is a different set of power domains on 8mq but same bits covers
all off them.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Change-Id: I1151c2bc2d32b1e02b4db16285b3d30cabc0d64d
Leonard Crestez
committed
on 8 May 2019
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2019-04-12 |
Mbed TLS: Remove weak heap implementation
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The implementation of the heap function plat_get_mbedtls_heap() becomes
mandatory for platforms supporting TRUSTED_BOARD_BOOT.
The shared Mbed TLS heap default weak function implementation is
converted to a helper function get_mbedtls_heap_helper() which can be
used by the platforms for their own function implementation.
Change-Id: Ic8f2994e25e3d9fcd371a21ac459fdcafe07433e
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
Ambroise Vincent
committed
on 12 Apr 2019
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2019-04-08 |
plat: imx8m: remove deprecated code include
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The 'drivers/console/aarch64/console.S' is not needed,
so remove it from build to fix the build error when
'ERROR_DEPRECATED'set.
Change-Id: Id047a355f82fd33298b7e2b49eff289d28eb5b56
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Jacky Bai
committed
on 8 Apr 2019
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2019-04-03 |
Makefile: remove extra include paths in INCLUDES
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Now it is needed to use the full path of the common header files.
Commit 09d40e0e0828 ("Sanitise includes across codebase") provides more
information.
Change-Id: Ifedc79d9f664d208ba565f5736612a3edd94c647
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
Ambroise Vincent
committed
on 3 Apr 2019
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Console: remove deprecated finish_console_register
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The old version of the macro is deprecated.
Commit cc5859ca19ff ("Multi-console: Deprecate the
`finish_console_register` macro") provides more details.
Change-Id: I3d1cdf6496db7d8e6cfbb5804f508ff46ae7e67e
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
Ambroise Vincent
committed
on 3 Apr 2019
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2019-03-12 |
plat: imx8m: Add the basic support for imx8mm
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The i.MX8M Mini is new SOC of the i.MX8M family. it is
focused on delivering the latest and greatest video and
audio experience combining state-of-the-art media-specific
features with high-performance processing while optimized
for lowest power consumption. The i.MX 8M Mini Media Applications
Processor is 14nm FinFET product of the growing i.MX8M family
targeting the consumer & industrial market. It is built in 14LPP
to achieve both high performance and low power consumption
and relies on a powerful fully coherent core complex based on
a quad Cortex-A53 cluster with video and graphics accelerators
this patch add the basic support for i.MX8MM.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Jacky Bai
committed
on 12 Mar 2019
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plat: imx8m: refactor the code to make it reusable
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for the i.MX8M SOCs, part of the code for gpc
and PSCI implementation can be reused and make it
common for all these SoCs. this patch extracts
the common part for reuse.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Jacky Bai
committed
on 12 Mar 2019
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2019-03-04 |
Merge pull request #1837 from spencercw/master
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imx: Configure CAAM job rings master ID for i.MX8MQ
Antonio Niño Díaz
authored
on 4 Mar 2019
GitHub
committed
on 4 Mar 2019
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2019-03-01 |
imx: make sure GIC redistributor is awake before initialization
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GICR_WAKER.ProcessorSleep can only be set to zero when:
— GICR_WAKER.Sleep bit[0] == 0.
— GICR_WAKER.Quiescent bit[31] == 0.
On some platforms, when system reboot with GIC in sleep
mode but with power ON, such as on NXP's i.MX8QM, Linux
kernel enters suspend but could be requested to reboot,
and GIC is in sleep mode and it is inside a power domain
which is ON in this scenario, when CPU reset, the GIC
driver trys to set CORE's redistributor interface to awake,
with GICR_WAKER.Sleep bit[0] and GICR_WAKER.Quiescent bit[31]
both set, the ProcessorSleep bit[1] will never be clear
and cause system hang.
This patch makes sure GICR_WAKER.Sleep bit[0] and
GICR_WAKER.Quiescent bit[31] are both zeor before clearing
ProcessorSleep bit[1].
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Anson Huang
committed
on 1 Mar 2019
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2019-02-22 |
imx: Configure CAAM job rings master ID for i.MX8MQ
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For i.MX8MQ B0 revision the default configuration of JRaMID is not valid
to allow the kernel to use the CAAM job rings. This patch sets the
master ID of the Cortex A in the JRaMID registers.
Signed-off-by: Chris Spencer <christopher.spencer@sea.co.uk>
Chris Spencer
authored
on 21 Feb 2019
Chris Spencer
committed
on 22 Feb 2019
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2019-02-12 |
imx: warp7: Migrate to MULTI_CONSOLE_API
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This commit migrates to MULTI_CONSOLE_API for IMX Warp7 board.
We also rename the functions in imx_uart driver to more specific one.
Signed-off-by: Ying-Chun Liu (PaulLiu) <paulliu@debian.org>
Ying-Chun Liu (PaulLiu)
committed
on 12 Feb 2019
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2019-02-01 |
Remove unneeded include paths in PLAT_INCLUDES
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Also, update platform_def.h guidelines about includes in the porting
guide.
Change-Id: I1ae338c9dd3242b309f6d53687ba2cb755d488c3
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz
committed
on 1 Feb 2019
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2019-01-28 |
imx: power optimization for i.mx8qx
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Current implementation of i.MX8QX power management related
features does NOT optimize power number, all system resources
like CCI, DDR, and A cluster etc. are kept in STBY mode (powered
ON) when system suspend or CPU hotplug.
To lower the power number, OFF mode should be adopted for those
system resources whenever they can be OFF, A cluster will be OFF
if the CPUs in the cluster are all off line, DDR/MU/DB can be OFF
if system suspend, IRQ steer can be OFF if the wakeup source is
belonged to system controller partition, so wakeup source runtime
check is used to determine if IRQ steer can be OFF before system
suspend.
If resources are powered off for suspend, they should be restored
properly after system resume.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Anson Huang
committed
on 28 Jan 2019
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imx: power optimization for i.mx8qm
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Current implementation of i.MX8QM power management related
features does NOT optimize power number, all system resources
like CCI, DDR, and A cluster etc. are kept in STBY mode (powered
ON) when system suspend or CPU hotplug.
To lower the power number, OFF mode should be adopted for those
system resources whenever they can be OFF, A cluster will be OFF
if the CPUs in the cluster are all off line, DDR/MU/DB can be OFF
if system suspend, IRQ steer can be OFF if the wakeup source is
belonged to system controller partition, so wakeup source runtime
check is used to determine if IRQ steer can be OFF before system
suspend.
If resources are powered off for suspend, they should be restored
properly after system resume.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Anson Huang
committed
on 28 Jan 2019
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2019-01-25 |
Merge pull request #1766 from Anson-Huang/master
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Add more SIP runtime service for i.MX8
Antonio Niño Díaz
authored
on 25 Jan 2019
GitHub
committed
on 25 Jan 2019
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2019-01-23 |
imx: enable necessary errata for i.mx8qm
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NXP's i.MX8QM uses Cortex-A53 r0p4, enable necessary
erratas for it.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Anson Huang
committed
on 23 Jan 2019
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imx: enable necessary errata for i.mx8mq
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NXP's i.MX8MQ uses Cortex-A53 r0p4, enable necessary
erratas for it.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Anson Huang
committed
on 23 Jan 2019
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2019-01-18 |
warp7: Enable Trusted Board Boot for WaRP7
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This patch enables Trusted Board Boot for warp7. A subsequent patch
contains build/run instructions.
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Jun Nie <jun.nie@linaro.org>
Bryan O'Donoghue
committed
on 18 Jan 2019
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warp7: Define DTB overlay address in memory map
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This patch defines the expected DTB overlay address in the memory map for
this platform. Its important that all points in the boot process agree on
this memory map even if not all elements utilize it.
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Bryan O'Donoghue
committed
on 18 Jan 2019
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warp7: io_storage: Remove DTB from FIP
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Recently upstreamed changes to OP-TEE mean that it is possible for OP-TEE
to provide a DTB overlay directly to subsequent boot stages thus negating
the requirement to bundle a DTB in the FIP.
This patch switches off the dependency on the DTB in the FIP descriptor
instead we will provide the necessary data as an overlay from OP-TEE.
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Bryan O'Donoghue
committed
on 18 Jan 2019
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