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History for arm-trusted-firmware / plat / imx

2020-10-09	831b0e9 Browse files » Don't return error information from console_flush ... And from crash_console_flush. We ignore the error information return by console_flush in _every_ place where we call it, and casting the return type to void does not work around the MISRA violation that this causes. Instead, we collect the error information from the driver (to avoid changing that API), and don't return it to the caller. Change-Id: I1e35afe01764d5c8f0efd04f8949d333ffb688c1 Signed-off-by: Jimmy Brisson <jimmy.brisson@arm.com> Jimmy Brisson authored on 5 Aug 2020 laurenw-arm committed on 9 Oct 2020
2020-08-20	fe5e1c1 Browse files » plat: imx8m: Fix the race condition during cpu hotplug ... CPU hotplug & cpuidle have some race condition when doing CPU hotplug stress test. different CPU cores have the chance to access the same GPC register(A53_AD), so lock is necessary to do exlusive access. Signed-off-by: Jacky Bai <ping.bai@nxp.com> Change-Id: I1296592e05fa78429c3f0fac066951521db755e3 Jacky Bai authored on 6 Jan 2020 Manish Pandey committed on 20 Aug 2020
2020-08-19	fb9212b Browse files » plat: imx8m: Correct the imr mask reg offset ... The number of gpc imr mask reg & the offset is different on some SOC, so correct it & replace the magic number with macro define. Signed-off-by: Jacky Bai <ping.bai@nxp.com> Change-Id: Ic701675cdd92e043dcd7f06722f2e871068aec74 Jacky Bai authored on 22 Jul 2020 Manish Pandey committed on 19 Aug 2020
2020-08-19	9eb1bb6 Browse files » plat: imx8m: Keep A53 PLAT on in wait mode(ret) ... Keep A53 PLAT(SCU) power domain on in wait mode(ret). RBC count only need to be set in PLAT OFF mode, so change it accordingly. Signed-off-by: Jacky Bai <ping.bai@nxp.com> Change-Id: Ie55e25c8210d298506fc4dca7a9653583db45e0c Jacky Bai authored on 8 Dec 2019 Manish Pandey committed on 19 Aug 2020
2020-08-06	8567103 Browse files » plat: imx: add sdei support for i.MX8MM ... Add sdei support for i.MX8MM, this is to let jailhouse Hypervisor could use SDEI to do hypervisor management, after physical IRQ has been disabled routing. Signed-off-by: Peng Fan <peng.fan@nxp.com> Change-Id: I5fd697fee22df151e13d0f1335e8ac8a7bae6189 Peng Fan authored on 27 Jul 2020 Peng Fan committed on 6 Aug 2020
2020-07-22	4a0ac3e Browse files » plat: imx: common: implement IMX_SIP_AARCH32 ... Implement IMX_SIP_AARCH32 to let AArch64 Bootloader could issue SIP call to switch to AArch32 mode to run OS. Signed-off-by: Peng Fan <peng.fan@nxp.com> Change-Id: I38b04ef909a6dbfba5ded12a7bb6e799a3935a66 Peng Fan authored on 10 Jul 2020 Peng Fan committed on 22 Jul 2020
2020-07-10	a775ef2 Browse files » plat: imx8mp: Add the basic support for i.MX8MP ... The i.MX 8MP Media Applications Processor is part of the growing i.MX8M family targeting the consumer and industrial market. It brings an effective Machine Learning and AI accelerator that enables a new class of applications. It is built in 14LPP to achieve both high performance and low power consumption and relies on a powerful fully coherent core complex based on a quad core Arm Cortex-A53 cluster and Cortex-M7 low-power coprocessor, audio digital signal processor, machine learning and graphics accelerators. Signed-off-by: Jacky Bai <ping.bai@nxp.com> Change-Id: I98311ebc32bee20af05031492e9fc24d06e55f4a Jacky Bai committed on 10 Jul 2020
2020-07-09	9e5c3e9 Browse files » plat: imx8m: Move the gpc hw reg to a separate header file ... Although the GPC provides the similar functions for all the i.MX8M SoC family, the HW register offset and bit defines still have some slight difference, so move the hw reg offset & most of the bitfield defines in 'gpc_reg.h' that is specific to each SoC. Signed-off-by: Jacky Bai <ping.bai@nxp.com> Change-Id: I291c435fe98c2f6e6ff8fe0c715ff3a83daa6a0f Jacky Bai committed on 9 Jul 2020
2020-05-27	69be915 Browse files » Merge "plat: imx8mn: Add imx8mn basic support" into integration Sandrine Bailleux authored on 27 May 2020 TrustedFirmware Code Review committed on 27 May 2020
2020-05-22	58fdd60 Browse files » plat: imx8mn: Add imx8mn basic support ... Add imx8mn basic support Signed-off-by: Jacky Bai <ping.bai@nxp.com> Change-Id: Ibdfcc87700bfaf980e429f3a5fa08515218ae78d Jacky Bai committed on 22 May 2020
2020-05-19	ad43c49 Browse files » Cleanup the code for TBBR CoT descriptors ... CoT used for BL1 and BL2 are moved to tbbr_cot_bl1.c and tbbr_cot_bl2.c respectively. Common CoT used across BL1 and BL2 are moved to tbbr_cot_common.c. Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com> Change-Id: I2252ac8a6960b3431bcaafdb3ea4fb2d01b79cf5 Manish V Badarkhe committed on 19 May 2020
2020-03-31	0edfd37 Browse files » Merge "plat: imx: imx8qx: provide debug uart num as build param" into integration Mark Dykes authored on 31 Mar 2020 TrustedFirmware Code Review committed on 31 Mar 2020
2020-03-30	a6ea06f Browse files » TF-A GICv3 driver: Introduce makefile ... This patch moves all GICv3 driver files into new added 'gicv3.mk' makefile for the benefit of the generic driver which can evolve in the future without affecting platforms. The patch adds GICv3 driver configuration flags 'GICV3_IMPL', 'GICV3_IMPL_GIC600_MULTICHIP' and 'GICV3_OVERRIDE_DISTIF_PWR_OPS' described in 'GICv3 driver options' section of 'build-option.rst' document. NOTE: Platforms with GICv3 driver need to be modified to include 'drivers/arm/gic/v3/gicv3.mk' in their makefiles. Change-Id: If055f6770ff20f5dee5a3c99ae7ced7cdcac5c44 Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com> Alexei Fedorov committed on 30 Mar 2020
2020-03-23	30617cc Browse files » plat: imx: imx8qx: provide debug uart num as build param ... 1. This removes hardcoded iomux/clk/addr configuration for debug uart, provides possibility (as a workaround, till that information isn't provided via DT) to set this configuration during compile time via IMX_DEBUG_UART build flag. Also for Colibri i.MX8QXP different pinmux configuration is applied for UART3, FLEXCAN2_RX/TX pads are muxed to ADMA_UART3_RX/TX. 2. Having DEBUG_CONSOLE enabled without enabling DEBUG_CONSOLE_A35 doesn't make sense (since UART pinmux/clock configuration is applied for UART only when DEBUG_CONSOLE_A35 is enabled. Check similar commit for i.MX8QM 98a69dfd4a("plat: imx: imx8qm: apply clk/pinmux configuration for DEBUG_CONSOLE")). Usage: $ make PLAT=imx8qx IMX_DEBUG_UART=3 DEBUG_CONSOLE=1 bl31 Signed-off-by: Igor Opaniuk <igor.opaniuk@gmail.com> Change-Id: I5d04939b2e8ee1a5f4b2f3c6241977d3c6e91760 Igor Opaniuk committed on 23 Mar 2020
2020-03-16	98a69df Browse files » plat: imx: imx8qm: apply clk/pinmux configuration for DEBUG_CONSOLE ... Having DEBUG_CONSOLE enabled without enabling DEBUG_CONSOLE_A53 doesn't make sense (since UART pinmux/clock configuration is applied for UART only when DEBUG_CONSOLE_A53 is enabled). Enable DEBUG_CONSOLE_A53 if DEBUG_CONSOLE is enabled. Signed-off-by: Igor Opaniuk <igor.opaniuk@gmail.com> Change-Id: I8ca411d5544658b9bcc39e5340ec042c51088b96 Igor Opaniuk committed on 16 Mar 2020
	fc1596b Browse files » plat: imx: imx8qm: provide debug uart num as build param ... This removes hardcoded iomux/clk/addr configuration for debug uart, provides possibility (as a workaround, till that information isn't provided via DT) to set this configuration during compile time via IMX_DEBUG_UART build flag. Usage: $ make PLAT=imx8qm IMX_DEBUG_UART=1 bl31 Signed-off-by: Igor Opaniuk <igor.opaniuk@gmail.com> Change-Id: Ib5f5dd81ba0c8ad2b2dc5647ec75629072f511c5 Igor Opaniuk committed on 16 Mar 2020
	965c078 Browse files » plat: imx: imx8_iomux: fix shift-overflow errors ... This fixes shift overflow errors, when compiled with CONSOLE_DEBUG support: plat/imx/common/include/imx8_iomux.h:11:35: error: result of ‘1 << 31’ requires 33 bits to represent, but ‘int’ only has 32 bits [-Werror=shift-overflow=] Signed-off-by: Igor Opaniuk <igor.opaniuk@gmail.com> Change-Id: I0488e22c30314ba27caabc5c767164baa1e8004c Igor Opaniuk committed on 16 Mar 2020
2020-03-11	6654d17 Browse files » Merge "TF-A GICv3 driver: Separate GICD and GICR accessor functions" into integration Mark Dykes authored on 11 Mar 2020 TrustedFirmware Code Review committed on 11 Mar 2020
2020-03-11	579c125 Browse files » Merge "plat: imx8mm: provide uart base as build option" into integration Sandrine Bailleux authored on 11 Mar 2020 TrustedFirmware Code Review committed on 11 Mar 2020
2020-03-10	6e19bd5 Browse files » TF-A GICv3 driver: Separate GICD and GICR accessor functions ... This patch provides separation of GICD, GICR accessor functions and adds new macros for GICv3 registers access as a preparation for GICv3.1 and GICv4 support. NOTE: Platforms need to modify to include both 'gicdv3_helpers.c' and 'gicrv3_helpers.c' instead of the single helper file previously. Change-Id: I1641bd6d217d6eb7d1228be3c4177b2d556da60a Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com> Alexei Fedorov committed on 10 Mar 2020
2020-03-05	60a23af Browse files » plat: imx8mm: provide uart base as build option ... Some boards (f.e. Verdin i.MX8M Mini) use different UART base address for serial debug output, so make this value configurable (as a build option). Signed-off-by: Igor Opaniuk <igor.opaniuk@gmail.com> Change-Id: I988492ccecbc3f64a5153b381c4a97b8a0181f52 Igor Opaniuk committed on 5 Mar 2020
2020-03-05	6627de5 Browse files » imx: console: Use CONSOLE_T_BASE for UART base address ... Since commit ac71344e9eca we have the UART base address in the generic console_t structure. For most platforms the platform-specific struct console is gone, so we must use the embedded base address, since there is no storage behind the generic console_t anymore. Replace the usage of CONSOLE_T_DRVDATA with CONSOLE_T_BASE to fix this. Change-Id: I6d2ab0bc2c845c71f98b9dd64d89eef3252f4591 Reported-by: Varun Wadekar <vwadekar@nvidia.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> Andre Przywara committed on 5 Mar 2020
2020-02-26	cf92be2 Browse files » Merge "plat: imx8m: Fix the rdc memory region slot's offset" into integration Sandrine Bailleux authored on 26 Feb 2020 TrustedFirmware Code Review committed on 26 Feb 2020
2020-02-25	d7873bc Browse files » imx: Use generic console_t data structure ... Since now the generic console_t structure holds the UART base address as well, let's use that generic location and drop the UART driver specific data structure at all. Change-Id: I058f793e4024fa7291e432f5be374a77faf16f36 Signed-off-by: Andre Przywara <andre.przywara@arm.com> Andre Przywara committed on 25 Feb 2020
2020-02-12	97600cb Browse files » plat: imx8m: Fix the rdc memory region slot's offset ... Each memory region slot occupies 16bypte space, so correct the the offset of config register address. Change-Id: Ief8f21bb8ada78b5663768ee1e40f9e0eae57165 Signed-off-by: Jacky Bai <ping.bai@nxp.com> Jacky Bai committed on 12 Feb 2020
2020-01-28	ca661a0 Browse files » Enable -Wredundant-decls warning check ... This flag warns if anything is declared more than once in the same scope, even in cases where multiple declaration is valid and changes nothing. Consequently, this patch also fixes the issues reported by this flag. Consider the following two lines of code from two different source files(bl_common.h and bl31_plat_setup.c): IMPORT_SYM(uintptr_t, __RO_START__, BL_CODE_BASE); IMPORT_SYM(unsigned long, __RO_START__, BL2_RO_BASE); The IMPORT_SYM macro which actually imports a linker symbol as a C expression. The macro defines the __RO_START__ as an extern variable twice, one for each instance. __RO_START__ symbol is defined by the linker script to mark the start of the Read-Only area of the memory map. Essentially, the platform code redefines the linker symbol with a different (relevant) name rather than using the standard symbol. A simple solution to fix this issue in the platform code for redundant declarations warning is to remove the second IMPORT_SYM and replace it with following assignment static const unsigned long BL2_RO_BASE = BL_CODE_BASE; Change-Id: If4835d1ee462d52b75e5afd2a59b64828707c5aa Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com> Madhukar Pappireddy committed on 28 Jan 2020
2020-01-24	7a57188 Browse files » imx: Unify Platform specific defines for PSCI module ... PLATFORM_CORE_COUNT - Unsigned int PLATFORM_CLUSTER_COUNT - Unsigned int PLATFORM_MAX_CPUS_PER_CLUSTER - Unsigned int PLATFORM_CORE_COUNT_PER_CLUSTER - Unsigned int Signed-off-by: Deepika Bhavnani <deepika.bhavnani@arm.com> Change-Id: I8b19e833a4e1067e1cfcc9bfaede7854e0e63004 Deepika Bhavnani authored on 13 Dec 2019 Soby Mathew committed on 24 Jan 2020
2020-01-21	004c922 Browse files » Merge changes Ib1ed9786,I6c4855c8 into integration ... * changes: plat: imx: Correct the SGIs that used for secure interrupt plat: imx8mm: Add the support for opteed spd on imx8mq/imx8mm Sandrine Bailleux authored on 21 Jan 2020 TrustedFirmware Code Review committed on 21 Jan 2020
2020-01-08	7a05f06 Browse files » Remove redundant declarations. ... In further patches, we wish to enable -wredundant-decls check as part of warning flags by default. Change-Id: I43410d6dbf40361a503c16d94ccf0f4cf29615b7 Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com> Madhukar Pappireddy committed on 8 Jan 2020
2019-12-04	118a67a Browse files » imx: Fix multiple definition of ipc_handle ... This is not conforming C and does not compile with -fno-common. Signed-off-by: Samuel Holland <samuel@sholland.org> Change-Id: I6535954cc567d6efa06919069b91e3f50975b073 Samuel Holland committed on 4 Dec 2019