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barebox / dts / Bindings / spi / jcore,spi.txt
@Sascha Hauer Sascha Hauer on 18 Oct 2016 737 bytes dts: update to v4.9-rc1
J-Core SPI master

Required properties:

- compatible: Must be "jcore,spi2".

- reg: Memory region for registers.

- #address-cells: Must be 1.

- #size-cells: Must be 0.

Optional properties:

- clocks: If a phandle named "ref_clk" is present, SPI clock speed
  programming is relative to the frequency of the indicated clock.
  Necessary only if the input clock rate is something other than a
  fixed 50 MHz.

- clock-names: Clock names, one for each phandle in clocks.

See spi-bus.txt for additional properties not specific to this device.

Example:

spi@40 {
	compatible = "jcore,spi2";
	#address-cells = <1>;
	#size-cells = <0>;
	reg = <0x40 0x8>;
	spi-max-frequency = <25000000>;
	clocks = <&bus_clk>;
	clock-names = "ref_clk";
}