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barebox / dts / Bindings / interrupt-controller / intel,ce4100-ioapic.txt
@Sascha Hauer Sascha Hauer on 10 Dec 2015 617 bytes dts: update to v4.4-rc1
Interrupt chips
---------------

* Intel I/O Advanced Programmable Interrupt Controller (IO APIC)

  Required properties:
  --------------------
     compatible = "intel,ce4100-ioapic";
     #interrupt-cells = <2>;

  Device's interrupt property:

     interrupts = <P S>;

  The first number (P) represents the interrupt pin which is wired to the
  IO APIC. The second number (S) represents the sense of interrupt which
  should be configured and can be one of:
    0 - Edge Rising
    1 - Level Low
    2 - Level High
    3 - Edge Falling

* Local APIC
  Required property:

     compatible = "intel,ce4100-lapic";