/*
 * SoC core Device Tree for the ARM Integrator platforms
 */

/include/ "skeleton.dtsi"

/ {
	core-module@10000000 {
		compatible = "arm,core-module-integrator";
		reg = <0x10000000 0x200>;
	};

	ebi@12000000 {
		compatible = "arm,external-bus-interface";
		reg = <0x12000000 0x100>;
	};

	timer@13000000 {
		reg = <0x13000000 0x100>;
		interrupt-parent = <&pic>;
		interrupts = <5>;
	};

	timer@13000100 {
		reg = <0x13000100 0x100>;
		interrupt-parent = <&pic>;
		interrupts = <6>;
	};

	timer@13000200 {
		reg = <0x13000200 0x100>;
		interrupt-parent = <&pic>;
		interrupts = <7>;
	};

	pic@14000000 {
		compatible = "arm,versatile-fpga-irq";
		#interrupt-cells = <1>;
		interrupt-controller;
		reg = <0x14000000 0x100>;
		clear-mask = <0xffffffff>;
	};

	flash@24000000 {
		compatible = "cfi-flash";
		reg = <0x24000000 0x02000000>;
	};

	fpga {
		compatible = "arm,amba-bus", "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;
		interrupt-parent = <&pic>;

		/*
		 * These PrimeCells are in the same locations and using the
		 * same interrupts in all Integrators, however the silicon
		 * version deployed is different.
		 */
		rtc@15000000 {
			reg = <0x15000000 0x1000>;
			interrupts = <8>;
		};

		uart@16000000 {
			reg = <0x16000000 0x1000>;
			interrupts = <1>;
		};

		uart@17000000 {
			reg = <0x17000000 0x1000>;
			interrupts = <2>;
		};

		kmi@18000000 {
			reg = <0x18000000 0x1000>;
			interrupts = <3>;
		};

		kmi@19000000 {
			reg = <0x19000000 0x1000>;
			interrupts = <4>;
		};
	};
};