Port of a Linux commit abf9775

  Add reset controller driver exposing various reset faculties,
  implemented by System Reset Controller IP block.

  Cc: Lucas Stach <l.stach@pengutronix.de>
  Cc: Mark Rutland <mark.rutland@arm.com>
  Cc: devicetree@vger.kernel.org
  Cc: linux-kernel@vger.kernel.org
  Cc: linux-arm-kernel@lists.infradead.org
  Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
  Acked-by: Rob Herring <robh@kernel.org>
  Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>

Linux commit 26fce05 was squashed
here as well:

  reset: imx7: Fix always writing bits as 0

  Right now the only user of reset-imx7 is pci-imx6 and the
  reset_control_assert and deassert calls on pciephy_reset don't toggle
  the PCIEPHY_BTN and PCIEPHY_G_RST bits as expected. Fix this by writing
  1 or 0 respectively.

  The reference manual is not very clear regarding SRC_PCIEPHY_RCR but for
  other registers like MIPIPHY and HSICPHY the bits are explicitly
  documented as "1 means assert, 0 means deassert".

  The values are still reversed for IMX7_RESET_PCIE_CTRL_APPS_EN.

  Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
  Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
  Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>