i.MX: clk-pllv3: Initially disable PLL_BYPASS bit
Commit cbff8031b491 ("i.MX: clk-pllv3: Do not touch PLL_BYPASS bit")
overreached a bit by removing the code that disables the PLL_BYPASS bit
for all architectures instead of making an exception for Vybrid and
i.MX6SL. This causes the USB controller on i.MX6Q to run at bypass
frequency and fail:

    barebox@Boundary Devices i.MX6 Quad Nitrogen6x Board:/ usb
    usb: USB: scanning bus for devices...
    usb: Bus 001 Device 001: ID 0000:0000 EHCI Host Controller
    imx-usb 2184200.usb: port(0) reset error

This patch adds code to unconditionally disable the PLL_BYPASS bit
initially, when the PLL clocks are registered.

Cc: Andrey Smirnov <andrew.smirnov@gmail.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Fixes: cbff8031b491 ("i.MX: clk-pllv3: Do not touch PLL_BYPASS bit")
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
1 parent 21dfbbe commit 0e384ee6642df0db711d1b2ffe3de94a353fc4dd
@Philipp Zabel Philipp Zabel authored on 11 Jul 2017
Lucas Stach committed on 14 Jul 2017
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drivers/clk/imx/clk-pllv3.c