MIPS: ath79: add initial QCA AR9344 SoC support
According to the documentation:
"The AR9344 is a highly integrated and feature-rich IEEE 802.11n 2x2 2.4/5 GHz
System-on-a-Chip (SoC) for advanced WLAN platforms.

It includes a MIPS 74Kc processor, PCI Express 1.1 Root Complex and Endpoint
interfaces, five port IEEE 802.3 Fast Ethernet Switch with MAC/PHY,
one MII/RMII/RGMII interface, one USB 2.0 MAC/PHY, and external memory
interface for serial Flash, SDRAM, DDR1 or DDR2, I2S/SPDIF-Out audio interface,
SLIC VOIP/PCM interface, two UARTs, and GPIOs that can be used for LED
controls or other general purpose interface configurations.
The AR9344 supports 802.11n operations up to 144 Mbps for 20 MHz and 300 Mbps
for 40 MHz respectively, and 802.11a/b/g data rates.
Additional features include Maximal Likelihood (ML) decoding, Low-Density
Parity Check (LDPC), Maximal Ratio Combining (MRC), Tx Beamforming (TxBF), and
On-Chip One-Time Programmable (OTP) memory."

Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
1 parent 1205276 commit 196aa5cd216ae804f0e8f6673fa1d9b3e5d80c7e
@Oleksij Rempel Oleksij Rempel authored on 9 Aug 2017
Lucas Stach committed on 15 Aug 2017
Showing 6 changed files
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arch/mips/dts/ar9344.dtsi 0 → 100644
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arch/mips/mach-ath79/include/mach/ar71xx_regs.h
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arch/mips/mach-ath79/include/mach/debug_ll.h
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arch/mips/mach-ath79/include/mach/debug_ll_ar9331.h 0 → 100644
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arch/mips/mach-ath79/include/mach/debug_ll_ar9344.h 0 → 100644
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arch/mips/mach-ath79/include/mach/pbl_ll_init_ar9344_1.1.h 0 → 100644