This is a port of the official PLL errata workaround from Freescale.
The PLL's in the i.MX51 processor can go out of lock due to a metastable
condition in an analog flip-flop when used at high frequencies.
This workaround implements an undocumented feature in the PLL (dither
mode), which causes the effect of this failure to be much lower (in terms
of frequency deviation), avoiding system failure, or at least decreasing
the likelihood of system failure.

This is based on U-Boot commit:

  commit 9db1bfa
  Author: David Jander <david@protonic.nl>
  Date:   Wed Jul 13 21:11:53 2011 +0000

    ARM: MX51: PLL errata workaround

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>