ARM: at91: choose proper parent for both MCI clocks
When booting from SDMMC0, Use of SDMMC1 fails with:
ERROR: clk: couldn't set sdmmc1_gclk clk rate to 480000000 (-22), current rate: 32768

This is because the first stage bootloader only reparents the boot SDMMC
instance and barebox does no automatic reparenting for the other one.

Force both clocks to have a suitable parent.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
1 parent f0b561f commit 238cf3326ac1ec009173c85fa664889d5cb57bdb
@Ahmad Fatoum Ahmad Fatoum authored on 22 Jun 2020
Sascha Hauer committed on 23 Jun 2020
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arch/arm/dts/sama5d2.dtsi