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serial: cadence: fix serial_flush
The TXEMPTY bit gets set as soon as the transmit FIFO gets empty, so
flushing must wait until the bit is set instead of being unset.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
WIP_next-LS master next v2020.07.0 v2020.06.0 v2020.05.0 v2020.04.0 v2020.03.0 v2020.02.0 v2020.01.0 v2019.12.0 v2019.11.0
1 parent 8685748 commit 24ff6d5a11c5f79701292c8ee9827ee724ffce4a
@Lucas Stach Lucas Stach authored on 1 Nov 2019
Sascha Hauer committed on 4 Nov 2019
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drivers/serial/serial_cadence.c