ARM: l2x0: move outer cache flush on disable to user
There are systems like the Calxeda Highbank, which need to do SMC
calls in order to access the secure L2C registers, which means they
want to replace the outer cache disable function with their own.

As the cache flush before entering the boot target is still needed
and to avoid exposing L2C internals to the architectures move the
flush before disable into the only current user.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
1 parent b4e1bdb commit 37a81422fd0df900845421a1d9273396e57a304e
@Lucas Stach Lucas Stach authored on 12 Oct 2015
Sascha Hauer committed on 13 Oct 2015
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arch/arm/cpu/cache-l2x0.c
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arch/arm/cpu/cpu.c