Port of a Linux commit 2f532d0

  PCIe PHY IP block on i.MX7D differs from the one used on i.MX6 family,
  so none of the code in the current implementation of
  imx6_setup_phy_mpll() or imx6_pcie_reset_phy() is applicable.

  Introduce IMX6_PCIE_FLAG_IMX6_PHY and check for it in the aforementioned
  functions to make sure they are only executed on appropriate PCIe IP
  variants.

  Tested-by: Trent Piepho <tpiepho@impinj.com>
  Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
  [lorenzo.pieralisi@arm.com: updated log]
  Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
  Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
  Cc: Bjorn Helgaas <bhelgaas@google.com>
  Cc: Fabio Estevam <fabio.estevam@nxp.com>
  Cc: Chris Healy <cphealy@gmail.com>
  Cc: Lucas Stach <l.stach@pengutronix.de>
  Cc: Leonard Crestez <leonard.crestez@nxp.com>
  Cc: "A.s. Dong" <aisheng.dong@nxp.com>
  Cc: Richard Zhu <hongxing.zhu@nxp.com>

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>