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    crypto: caam - fix writing to JQCR_MS when using service interface

    Most significant part of JQCR (Job Queue Control Register) contains
    bits that control endianness: ILE - Immediate Little Endian,
    DWS - Double Word Swap.
    The bits are automatically set by the Job Queue Controller HW.

    Unfortunately these bits are cleared in SW when submitting descriptors
    via the register-based service interface.
    >From LS1021A:
    JQCR_MS = 08080100 - before writing: ILE | DWS | SRC (JR0)
    JQCR_MS = 30000100 - after writing: WHL | FOUR | SRC (JR0)

    This would cause problems on little endian caam for descriptors
    containing immediata data or double-word pointers.
    Currently there is no problem since the only descriptors ran through
    this interface are the ones that (un)instantiate RNG.

    Signed-off-by: Horia Geant? <horia.geanta@freescale.com>
    Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>