ARM: i.MX: boot: correctly handle SRC_SBMR1 override via SRC

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Browse code ARM: i.MX: boot: correctly handle SRC_SBMR1 override via SRC_GPR9 `mw 0x20d8040 0x08000030; mw 0x20d8044 0x10000000; reset` issued on an i.MX6Q forces boot from the ecspi1. This is because the BootROM reads the boot mode out of SRC_GPR9 instead of SRC_SBMR1 whenever SRC_GPR10 has its 28th bit set. Teach barebox about this, so we don't end up with a wrong $bootsource when putting SRC_GPR9 into use. Signed-off-by: Ahmad Fatoum <ahmad@a3f.at> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> WIP_next-LS master next v2020.07.0 v2020.06.0
1 parent 085f73d commit 7be1d2fc5209d5888be0e40991e777e57bfbd906 Ahmad Fatoum authored on 27 Apr 2020 Sascha Hauer committed on 8 May 2020

Browse code

ARM: i.MX: boot: correctly handle SRC_SBMR1 override via SRC_GPR9

`mw 0x20d8040 0x08000030; mw 0x20d8044 0x10000000; reset` issued on an
i.MX6Q forces boot from the ecspi1. This is because the BootROM reads
the boot mode out of SRC_GPR9 instead of SRC_SBMR1 whenever SRC_GPR10
has its 28th bit set.

Teach barebox about this, so we don't end up with a wrong $bootsource
when putting SRC_GPR9 into use.

Signed-off-by: Ahmad Fatoum <ahmad@a3f.at>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

WIP_next-LS master next v2020.07.0 v2020.06.0

1 parent 085f73d commit 7be1d2fc5209d5888be0e40991e777e57bfbd906

Ahmad Fatoum authored on 27 Apr 2020

Sascha Hauer committed on 8 May 2020

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