This commit is based on this linux commit:

    commit 2fa3639
    Author: Kelvin Cheung <keguang.zhang@gmail.com>
    Date:   Wed Jun 20 20:05:32 2012 +0100

        MIPS: Add CPU support for Loongson1B

        Loongson 1B is a 32-bit SoC designed by Institute of Computing Technology
        (ICT) and the Chinese Academy of Sciences (CAS), which implements the
        MIPS32 release 2 instruction set.

        [ralf@linux-mips.org: But which is not strictly a MIPS32 compliant device
        which also is why it identifies itself with the Legacy Vendor ID in the
        PrID register.  When applying the patch I shoveled some code around to
        keep things in alphabetical order and avoid forward declarations.]

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>