ARM: i.MX6: Enable parent propagation for clk_gate2
Enable parent rate propagation for clk_gate2 to allow the clock consumers to adjust their rates. One effect of this is that the i.MX6 NAND controller now can adjust its rate. It already called a clk_set_rate(rate, 96000000), but this had no effect, so the clock stayed at reset default 24MHz resulting in a rather slow timing. This became a problem when commit "1daa3bc mtd: nand_mxs: Setup timing" introduced EDO timing mode for faster NAND chips. EDO mode can only work properly for cycle times < 30ns (at least that's specified in the ONFI spec). 1daa3bc resulted in sporadic NAND read errors on some boards. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Tested-by: Sam Ravnborg <sam@ravnborg.org>
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arch/arm/mach-imx/clk-gate2.c |
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