ARM: i.MX: fixed enabling the MMU after switching in non secure mode.
The Domain Access Control Register (DACR) in CP15 is banked between
secure and non secure mode: there a copy of the reg. in secure mode and a
second copy in non secure mode.
As barebox boots on the imx7 SOC it runs in secure mode and initializes
the secure-mode copy of DACR (with 0x00000001).
After switching to non secure mode, for example with the command 'smc -n'
or while booting a kernel image with global.bootm.secure_state=nonsecure,
the active value of DACR is the copy in non-secure mode and that copy
was still uninitialized and in an UNKNOWN state.

This caused the cpu to hang as soon as the MMU was enabled in non-secure
mode.

We fix this by reading the DACR value in secure mode just before switching
to non secure and then initializing it again with the same value.

Signed-off-by: Giorgio Dal Molin <giorgio.nicole@arcor.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
1 parent 41594be commit b1d30239ccde137bcd998437ef96d4af3a696415
@Giorgio Dal Molin Giorgio Dal Molin authored on 7 Apr 2020
Sascha Hauer committed on 14 Apr 2020
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arch/arm/cpu/mmu.h
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arch/arm/cpu/sm.c