start-arm: disable I-cache
<HACK>

For some yet unknown reason the processor on the i.MX35 3stack board (at
least on our board) has problem with an activated instruction cache and
booting from NAND: The copy-from-NFC-RAM-to-SDRAM routine doesn't loop.

It looks basically like this:

1:
	ldmia
	stmia
	cmp
	ble 1b

If the "cmp" instruction lives on address 0xbb000640 it doesn't work
with an activated i-cache. The processor flags are not properly updated.
So the ble won't jump back. This obviously break booting from nand.

This is why this patch disables the i-cache.

</HACK>

Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
1 parent 26950ce commit b8d58b14a27b126433d89135f174c9e25c78da43
@Marc Kleine-Budde Marc Kleine-Budde authored on 7 Dec 2009
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arch/arm/cpu/start-arm.S