ARM: dts: phyCORE-i.MX 6UL/ULL: Enable USB OTG on port 1

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Browse code ARM: dts: phyCORE-i.MX 6UL/ULL: Enable USB OTG on port 1 Enable USB OTG support on USB OTG port 1 of the phyCORE-i.MX 6UL/ULL. Signed-off-by: Fabian Godehardt <fg@emlix.com> Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> WIP_next-LS master next v2020.07.0 v2020.06.0 v2020.05.0 v2020.04.0 v2020.03.0 v2020.02.0 v2020.01.0 v2019.12.0 v2019.11.0 v2019.10.0 v2019.09.0 v2019.08.1 v2019.08.0 v2019.07.0 v2019.06.1 v2019.06.0 v2019.05.0 v2019.04.0 v2019.03.0 v2019.02.0 v2019.01.0
1 parent 6304b2b commit ca343ec8a2d09ab0708cb007ac0382960a31b218 Fabian Godehardt authored on 5 Dec 2018 Sascha Hauer committed on 6 Dec 2018

Browse code

Enable USB OTG support on USB OTG port 1 of the phyCORE-i.MX 6UL/ULL.

Signed-off-by: Fabian Godehardt <fg@emlix.com>
Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

WIP_next-LS master next v2020.07.0 v2020.06.0 v2020.05.0 v2020.04.0 v2020.03.0 v2020.02.0 v2020.01.0 v2019.12.0 v2019.11.0 v2019.10.0 v2019.09.0 v2019.08.1 v2019.08.0 v2019.07.0 v2019.06.1 v2019.06.0 v2019.05.0 v2019.04.0 v2019.03.0 v2019.02.0 v2019.01.0

1 parent 6304b2b commit ca343ec8a2d09ab0708cb007ac0382960a31b218

Fabian Godehardt authored on 5 Dec 2018

Sascha Hauer committed on 6 Dec 2018

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