Several DDR3 phy registers are written with the pattern x<<30 | x<<20 | x<<10 | x.
The x<<30 doesn't fit into 32bit which causes a compiler warning.
Looking at the reference manual only the lower 10bit of the registers
have any meaning, so drop the other bogus values. This affects the
registers:

AM33XX_DATA0_RD_DQS_SLAVE_RATIO_0
AM33XX_DATA0_WR_DQS_SLAVE_RATIO_0
AM33XX_DATA0_WR_DQS_SLAVE_RATIO_1
AM33XX_DATA0_WRLVL_INIT_RATIO_0
AM33XX_DATA0_GATELVL_INIT_RATIO_0
AM33XX_DATA0_GATELVL_INIT_RATIO_1
AM33XX_DATA0_FIFO_WE_SLAVE_RATIO_0
AM33XX_DATA0_WR_DATA_SLAVE_RATIO_0

(AM33XX_DATA0_WR_DQS_SLAVE_RATIO_1 and AM33XX_DATA0_GATELVL_INIT_RATIO_1
do not even exist according to the reference manual, but that's another
story.)

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>