The document "PC16550D Universal Asynchronous
Receiver Transmitter with FIFOs" (vers. June 1995,
http://www.national.com/ds/PC/PC16550D.pdf) states
that IER (Interrupt Enable Register) is accessible
if the bit DLAB = 0 (DLAB is bit 7 in LCR; in barebox
DLAB known as LCR_BKSE).

So before IER access we need set DLAB to 0.

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>