The pin SD4_DAT4 until SD4_DAT7 are used as revison control.
The pins will be internally pulled up so we read a 1111 for revison 1.
For revison two the first pin (bit) is pulled down (see schematic pfla-02
page 4 "SDIO, NAND-Flash".
On Module rev 1 the pins are connected to the NAND but we have only 8bit NAND
also the i.MX6 only can handle 8bit NAND flashs.

Revisions:
	Rev 1:  0xF
	Rev 2:  0xE
		.
		.
		.
	Rev 15: 0x1
	Rev 16: 0x0

Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>