Merge branch 'for-next/mxs'

Merge branch 'for-next/at91'

pinctrl: add gpio and pinctrl driver for sama5d2 PIO4 ...

The sama5d2 features a GPIO and pin controller different than the one
we support in barebox. The device tree bindings are different as well,
so it makes sense to have a separate driver for it.

Add the pin control and GPIO driver as well as some helpers usable
from PBL, should we want to do pinmuxing that early.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: mxs: Move HAVE_PBL_MULTI_IMAGES up to ARCH ...

Now that all boards in mach-mxs select HAVE_PBL_MULTI_IMAGES we can move
it up to ARCH_MXS.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: drop bultin DTB ...

We can build multiple DTBs into the binary and board code can select
which one to use. Drop the single builtin DTB and let the boards using
it pass the correct one.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: NETX: remove architecture ...

NETX support has been removed from the Kernel, so there's no point in
supporting it in barebox any longer. Remove the architecture.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Merge branch 'for-next/qemu'

Kconfig: create Kconfig symbol for ARCH_HAS_DATA_ABORT_MASK ...

Other arch-specific features are exposed in Kconfig too, so do here
likewise.

Signed-off-by: Ahmad Fatoum <ahmad@a3f.at>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Kconfig: create Kconfig symbol for ARCH_HAS_STACK_DUMP ...

Other arch-specific features are exposed in Kconfig too, so do here
likewise.

Signed-off-by: Ahmad Fatoum <ahmad@a3f.at>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: Add generic device tree 2nd stage support ...

This adds support for building a barebox image that boots with the
Linux ARM Kernel booting convention. Support for this image can be
enabled in Kconfig. It picks up a device tree passed in r2. This new
image helps for example with qemu. It can be started with:

qemu-system-aarch64 -m 2G -M virt -kernel images/barebox-dt-2nd.img -cpu cortex-a57 -serial stdio

or:

qemu-system-arm -m 1G -M sabrelite -kernel images/barebox-dt-2nd.img -nographic -dtb arch/arm/dts/imx6q-sabrelite.dtb

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: stm32mp: fix some misnomers/typos ...

The arch was renamed to stm32mp, so it doesn't look out of place when
the stm32mp2 is released. Fix spotted comments/labels with the old
name. While at it, fix a typo about the SoC name on the DK2 board.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

pinctrl: add driver for STM32 GPIO and pin multiplexer ...

This adds driver support for the 12 GPIO banks on the STM32MP157.
As they are accessible to both the Cortex-A cores as well as the Cortex-M
core, modifications to these are protected by a hardware spinlock
and clocks are enabled/disabled as required.

All register fiddling done by the driver is collected in <soc/stm32/gpio.h>,
so future PBL code may make use of it as well to chainload barebox proper.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: stm32mp1: rename to stm32mp ...

Serial and clk driver both depend on CONFIG_ARCH_STM32MP1,
so either the Kconfig symbol or their depend needs to change.

Patches posted by the vendor to Linux, U-Boot and their BSP
Yocto-Layer speak of a STM32MP-Family of which the STM32MP1
is the first series, thus rename the arch by dropping the 1.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: psci: factor out of_psci_fixup() to separate file ...

of_psci_fixup() can be used by code which doesn't use the barebox
psci implementation, but provides its own PSCI compatible firmware.
Factor it out to a separate file to compile it independently of the
barebox PSCI implementation.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Merge branch 'for-next/stm32'

Merge branch 'for-next/misc'

treewide: surround Kconfig file paths with double quotes ...

Based on Linux commit 8636a1f

This will be needed when you sync Kconfig with Linux 5.0 or later.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

clk: Add Layerscape clk support ...

This adds support for the clock controller found on Layerscape
SoCs. This is mostly an adoption of the corresponding Linux
driver. This is tested on the LS1046a SoC. Other ARM based Layerscape
SoCs should work aswell, support for the PowerPC based SoCs has
been removed.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: Add basic Layerscape support ...

This adds basic Layerscape support:

- Makefile/Kconfig
- Register maps
- errata workarounds

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: Add initial STM32MP1 support ...

This adds initial STMicroelectronics MP1 support along with support
for the DK2 devel board. Only very basic support:

- UART
- SDRAM memory base/size
- No 1st stage support

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

firmware-zynqmp: port from linux ...

Port Xilinx Zynq MPSoC Firmware layer driver from linux.

Signed-off-by: Thomas Haemmerle <thomas.haemmerle@wolfvision.net>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: zynqmp: select macb driver ...

macb supports Xilinx ZynqMP GEM, so select HAS_MACB by default.

Signed-off-by: Thomas Haemmerle <thomas.haemmerle1988@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: zynqmp: add support for Xilinx ZCU104 board ...

Add support for the Xilinx Zynq Ultrascale+ MPSoC architecture (ZynqMP)
and the Xilinx ZCU104 board.

Barebox is booted as BL33 in EL-1 and expects that a BL2 (i.e. the FSBL)
already took care of initializing the RAM. Also for debug_ll, the UART
is expected to be already setup correctly. Thus, you have to add the
Barebox binary to a boot image as described in "Chapter 11: Boot and
Configuration" of "Zynq Ultrascale+ Device Technical Reference Manual".

Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

kconfig: include common Kconfig files from top-level Kconfig ...

Based on this linux kernel commit:

> commit 1572497
> Author: Christoph Hellwig <hch@lst.de>
> Date:   Tue Jul 31 13:39:30 2018 +0200
>
>     kconfig: include common Kconfig files from top-level Kconfig

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Merge branch 'for-next/socfpga'

ARM: socfpga: Arria10: support programming FPGA in PBL ...

Some Arria10 boards don't have the FPGA programmed externally.
Instead barebox needs to do that. As the Arria10 has the SDRAM
controller in the FPGA, the first thing we need to do is,
configure the FPGA before the SDRAM can even be used.

It works like this:
  1. boot ROM fetches the PBL from MMC
  2. read the MBR from MMC (this depends on the setup done by the boot ROM)
  3. read the Bitstream from the MMC and program the FPGA
  4. re-read the barebox image from MMC, this time with the full barebox
     that is appended to the PBL
  5. jump into the full barebox

Only supported boot device is eMMC.

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: Add code to support SMCCC on AArch64 ...

Port SMCCC code from Linux kernel. To accomodate that:

  - Introduce CONFIG_ARM_SMCCC, to allow enabling the code
    independent of CONFIG_ARM_SECURE_MONITOR

  - Bring <linux/arm-smccc.h> in

  - Add necessary constants to arch/arm/asm-offsets.c

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Merge branch 'for-next/misc'

scripts: create a separate section for host tools ...

This allows to enable host tools even if they are not needed for the
current configuration to improve compile coverage and simplify packaging
these tools. The conversion doesn't cover all tools available but can be
extended later.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: lib64: Make string functions aware of MMU configuration ...

Optimized version of memset() in memset.S if called as:

    memset(foo, 0, size)

will try to explicitly zero out data cache with:

    dc	zva, dst

which will result in Alignement Exception (DABT) if MMU is not
enabled.

For more info see:

    - C4.4.8 "DC ZVA, Data Cache Zero by VA"
    - D5.2.8 "The effects of disabling a stage of address translation"

in "ARM Architecture Reference Manual. ARMv8, for ARMv8-A architecture
profile"

In similar vein, using optimized version of memcpy() could lead to a
unaligned 16-byte write (using 'stp'), which is not allowed for
Device-nGnRnE type of memory (see D5.2.8) and would liead to
Alignement Exception.

To fix both problems expose non-optimized and optimzied versions of
the function and created a wrapper to dispatch the call to either one
based on if MMU is enabled or not.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>