Merge branch 'for-next/module'

treewide: Convert files covered by ARM copyright to SPDX ...

According to Marc Zyngier, former employee at ARM, the company owns the
copyright for code created by its employees. Convert accordingly to SPDX
with the usual rearrangements. Also dropped Marc's email address which
doesn't work any more.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

arch/arm/include: Convert to SPDX-License and -Copyright specifiers ...

Converts the files that licensecheck can determine the license for. Also
convert to obvious right Copyright statements. Additionally some minor
code reformatting is done.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

arm: module: Allow modules outside of bl range ...

Unlike the Linux kernel, barebox does not have a dedicated heap for
storing modules. Therefore, if the system memory configuration places
the general heap further away than can be reached by a 'bl' instruction
(24 bits of address, or 16 MiB), then the module relocations will fail
due to being out of range.

Allocate PLTs when loading modules so that jumps and calls whose
targets are too far away for their relative offsets to be encoded
in the instructions themselves can be bounced via veneers in the
module's PLT. The modules will use slightly more memory, but after
rounding up to page size, the actual memory footprint is usually
the same.

Adoption of Linux commits:

66e94ba3c8ea ARM: kernel: avoid brute force search on PLT generation
1031a7e674d1 ARM: kernel: sort relocation sections before allocating PLTs
05123fef0982 ARM: kernel: allocate PLT entries only for external symbols
35fa91eed817 ARM: kernel: merge core and init PLTs
7d485f647c1f ARM: 8220/1: allow modules outside of bl range

Signed-off-by: David Dgien <dgienda125@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

arm: elf: Add THM relocation types ...

Signed-off-by: David Dgien <dgienda125@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Merge branch 'for-next/sandbox-compile-test'

ARM: atomic.h: move generic implementation to asm-generic ...

For easier code-sharing, the UBIFS code still uses the Linux atomic
accessors.  Make porting it to sandbox easier, by providing these
functions for all platforms.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: asm/io.h: fall back to <asm-generic/bitio.h> out_be32 and friends ...

With the generic implementations in place in <asm-generic/bitio.h>, we can
drop the now-duplicate ARM definitions.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

arch: include <asm-generic/int-ll64.h> from <asm/types.h> ...

Many architectures duplicate the same fixed type definitions
as in <asm-generic/int-ll64.h>.

Include <asm-generic/int-ll64.h> from <asm/types.h>, and remove
the duplicated code.

Note:
Linux commit 0c79a8e29b5f ("asm/types.h: Remove
include/asm-generic/int-l64.h") unified the kernel space
definition into int-ll64.h. Barebox also adopts int-ll64.

Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

treewide: remove references to CREDITS ...

The CREDITS file was removed from barebox in 2015 by commit 6570288f2d97
("Remove the CREDITS file"). Remove references to it from several files.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: include: remove unused <asm/processor.h> ...

File has been in source tree for 17 years and is unused.
Drop it. The only definition we might want out of the file is
cpu_relax(), which we already open code as barrier() with a comment in a
couple of places. Move the definition to <linux/barebox-wrapper.h>
and drop the file altogether.

No functional change.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: add optee early loading function ...

Add a OP-TEE early loading function which expects a pointer to a valid
tee binary and the device tree. OP-TEE will then be started and barebox
will continue to run in normal mode.

The function start_optee_early should be used in a boards lowlevel.c
file. Ensure that barebox has been relocated and a proper c environment
has been setup beforehand. Depending on the OP-TEE configuration, the
fdt will be modified. If the internal barebox device tree is passed,
OP-TEE will overwrite barebox PBL memory during this modification. Copy
the fdt to a save memory location beforehand to avoid a corruption of
barebox PBL memory.

This also moves the OP-TEE Kconfig symbols into a separate menu.

Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: import setjmp implementation from U-Boot ...

Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Merge branch 'for-next/randfixes'

ARM: implement CONFIG_PBL_BREAK for ARM64 ...

ARM64 uses a different assembler mnemonic for the breakpoint.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM64: Switch to 4 level page tables ...

3 level page tables only allow to resolve 39 bit addresses. Switch to 4
level page tables to add support for bigger physical address ranges.
This is needed for example on Layerscape SoCs where the PCI windows are
outside the 39bit range.

The early MMU support still uses 39bit addressing. We only use a single
level page table in early MMU support and with 48bit addresses we
wouldn't have enough granularity to map the SDRAM differently then the
rest of the address space.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: psci: implement PSCI client driver ...

System reset on the STM32MP may be done via PSCI when running TF-A
as first-stage boot loader. Provide a PSCI driver to simplify using it:

- A psci_invoke function is exported, so other code can use it
- A fixup for the PSCI device tree node is registered
- A reset and poweroff handler via PSCI is registered for PSCI >= v0.2

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: aarch64: Re-implement most of barebox_arm_entry() in assembly ...

GCC9 now produces the following warning:

common.h:51:2: warning: listing the stack pointer register ‘sp’ in a clobber list is deprecated [-Wdeprecated]
   51 |  __asm__ __volatile__("mov sp, %0"
      |  ^~~~~~~
common.h:51:2: note: the value of the stack pointer after  an ‘asm’ statement must be the same as it was before the statement

Stack pointer was added to clobber list in commit f9fc8254b2 ("ARM:
Mark SP as being clobbered in arm_setup_stack()") to prevent GCC from
generating code that would corrupt 'boarddata' pointer by trying to
restore it from invalid stack frame.

Interestingly enough, seemingly unrelated change in commit
64d95896cf ("ARM: aarch64: compile with general-regs-only") changed
generated code such that adding SP to clobber list became no longer
necessary.

While the above can probably be a fix by itself, it seems a better and
more future proof approach would be to address the problem at its root
and re-implement offending startup sequence in assembly.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Kconfig: retire empty <asm/barebox.h> ...

With the latest changes, this file is empty on all archs. Drop it.

Signed-off-by: Ahmad Fatoum <ahmad@a3f.at>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Kconfig: create Kconfig symbol for ARCH_HAS_DATA_ABORT_MASK ...

Other arch-specific features are exposed in Kconfig too, so do here
likewise.

Signed-off-by: Ahmad Fatoum <ahmad@a3f.at>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Kconfig: create Kconfig symbol for ARCH_HAS_STACK_DUMP ...

Other arch-specific features are exposed in Kconfig too, so do here
likewise.

Signed-off-by: Ahmad Fatoum <ahmad@a3f.at>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: access __boot_cpu_mode with a function ...

__boot_cpu_mode is accessed from barebox_multi_pbl_start() and
barebox_single_pbl_start(). These functions may be called at an
address different from the address they are linked at. Calculating
the address of global variables can yield wrong results when it
is done before setup_c() is called. We can't make sure when the
address is calculated, OSELAS.Toolchain-2018.12.0 indeed calculates
the address after setup_c() is called, but Debian
arm-linux-gnueabihf-gcc 8.3.0 does it before setup_c() is called
and thus doesn't work.
This is solved by accessing __boot_cpu_mode with a wrapper function
which we call explicitly after setup_c() is done.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: Fix global_variable_offset() for aarch64 ...

Not all toolchains use pc relative addresses for global variables.
Apparently the gcc 8.3.0 YOCTO toolchain uses absolute addresses.
This means can't simply return 0 for global_variable_offset() but
instead have to calculate the offset between the compile addresses
for global variables and their runtime address.
We do this by getting the address of a global variable pc relative
explicitely in assembly and substracting that address from the
location the C compiler thinks they are.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Merge branch 'for-next/stm32'

ARM: sm: move get_gicd_base_address to header for reuse ...

Incoming PSCI implementation for the STM32MP1 needs
to get_gicd_base_address as well, so move it to gic.h to
avoid code duplication.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

add CONFIG_PBL_BREAK option ...

With this option barebox will be build with breakpoint instruction
in early pbl stage.

Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Merge branch 'for-next/arm'

ARM: Initial OP-TEE support ...

This adds initial support for OP-TEE, see https://www.op-tee.org/

barebox starts in secure mode as usual. When booting a kernel
the bootm code also loads the optee_os binary. Instead of jumping
into the kernel barebox jumps into the optee_os binary and puts
the kernel execution address into the lr register. OP-TEE then
jumps into the kernel in nonsecure mode.

The optee_os binary is passed with the -t option to bootm or
with global.bootm.tee.

Optionally OP-TEE can be compiled into barebox using the builtin firmware
feature. Enable the Kconfig option and place or link your tee binary as
optee.bin into the firmware directory.

The amount of SDRAM which is kept free for OP-TEE is configurable.

This patch was tested on a i.MX6 Nitrogen6x board.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: include: dma: Zero out DMA coherent memory in no-MMU case ...

Add code to match the behavior of dma_alloc_coherent() when CONFIG_MMU
is selected.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: psci: factor out of_psci_fixup() to separate file ...

of_psci_fixup() can be used by code which doesn't use the barebox
psci implementation, but provides its own PSCI compatible firmware.
Factor it out to a separate file to compile it independently of the
barebox PSCI implementation.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>