On i.MX6ul(l) (Cortex A7) We have to set the SMP bit before
enabling the caches, otherwise they won't work. Add a SoC specific
lowlevel_init function to be called by the i.MX6ul(l) boards.

Since this is a quirk of the Cortex A7 core we put the functionality
into a separate function to be reused by other Cortex A7 cores.

Change existing i.MX6ul(l) boards to use the new initialisation
function. It seems this is only needed when booting from USB,
in other boot modes the ROM will already have done the initialisation.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Created imx6ull devicetree to support Phytec phyCORE-i.MX6ULL.
 - 256 MB RAM
 - 128 MB NAND
 - 10/100 Mbit Ethernet

Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Add support for the phycore i.MX6 UltraLite.
 - 512MB RAM
 - 512MB NAND
 - 10/100 Mbit Ethernet

Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Stefan Lengfeld <s.lengfeld@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Add Phytec phyCORE-i.MX6 SOM.
  Support:
   - imx6dl-phytec-phycore-som-emmc:
      - 1GB RAM on 1 Bank with 64Bit
      - 10/100MBit Ethernet
      - SPI NOR
      - eMMC
      - SD
      - UART

Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Add new Phytec phyCORE-i.MX6 SOM:
  Support:
    - imx6q-phytec-phycore-som-emmc:
       - 2GiB RAM on 1 Bank with 64Bit
       - 1GBit Ethernet
       - SPI NOR
       - eMMC
       - SD
       - UART

Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Add support for phyBOARD-SUBRA-i.MX6 with phyFLEX-i.MX6 Quad 1GiB on one
bank. This patch factors out the common device tree nodes for the Quad
and Solo variant into 'imx6qdl-phytec-phyboard-subra.dtsi'.

Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Add Phytec phyCORE-i.MX6 SOM.
     - imx6dl-phytec-phycore-som-nand
        - 256GB RAM on 1 Bank with 32Bit
        - 10/100MBit Ethernet
        - NAND
        - SD
        - UART

Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Add Phytec phyCORE-i.MX6 SOM.
    Support:
     - imx6q-phytec-phycore-som-nand:
        - 1GB RAM on 1 Bank with 64Bit
        - 1GBit Ethernet
        - SPI NOR
        - NAND
        - SD
        - UART

     - imx6q-phytec-phycore-som-emmc
        - 1GB RAM on 1 Bank with 64Bit
        - 1GBit Ethernet
        - SPI NOR
        - eMMC
        - SD
        - UART

Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Add support for phyFLEX-i.MX6 DualLite 1GiB on one bank with NOR.

Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Add support for phyFLEX-i.MX6 Solo with 128MB and 256MB RAM on one
memory bank.

Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Add support for phyFLEX-i.MX6 Quad 512MiB RAM on one bank.

Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

In the current naming schema the phyFLEX-i.MX6 variants which only use
one bank for memory have the suffix "1bank". The variants which use two
banks of memory have no suffix.

The patch fixes the name of the phyFLEX-i.MX6 Solo variant with 512MiB
on one bank. So the name of the image file changes from
    barebox-phytec-pbab01s-512mb.img
    barebox-phytec-phyboard-subra-512mb.img
to
    barebox-phytec-pbab01s-512mb-1bank.img
    barebox-phytec-phyboard-subra-512mb-1bank.img

This patch touches the phyFLEX-i.MX6 Kit variant and the
phyBOARD-SUBRA-i.MX6 which shares the same phyFLEX-i.MX6 module.

Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

The main idea behind this patch is to avoid redundant code.  Because of
the module similarities of all i.MX6 based phytec boards, we can merge
its code.

The phytec-som-imx6 merges the code of all i.MX6 based phytec SOMs.  So
we will have only one "board" in the barebox for phyCARD-i.MX6 and
phyFLEX-i.MX6.

Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>