ARM: mmu: Replace various SZ_1M with PGDIR_SIZE ...

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: mmu: Replace hardcoded shifts with pgd_index() from Linux ...

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: mmu: Share PMD_SECT_DEF_CACHED ...

Share PMD_SECT_DEF_CACHED between mmu.c and mmu-early.c.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: mmu: Share code for initial flat mapping creation ...

Code creating inital 4GiB flat mapping is identical between mmu.c and
mmu-early.c, so move it to mmu.h and share.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: mmu: Specify size in bytes in create_sections() ...

Seeing

        create_sections(ttb, 0, PAGE_SIZE, ...);

as the code the creates initial flat 4 GiB mapping is a bit less
intuitive then

        create_sections(ttb, 0, SZ_4G - 1, ...);

so, for the sake of clarification, convert create_sections() to accept
address of the last byte in the region instead of size in MiB. Note
the alternative of converting size to units of bytes was not chosen to
avoid converting 3-rd function argument into a 64-bit number.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: mmu: Separate index and address in create_sections() ...

Both TTB index and address used to fill that entry are derived from
the same variable 'addr' which requires shifting right and left by 20
and somewhat confusing.

Split the counter used to iterate over elements of  TTB into a
separate variable to make this code a bit easier to read.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: mmu: Share code for create_sections() ...

Regular MMU code never creates anything but 1:1 mapping, and barring
that plus the call to __mmu_cache_flush(), early MMU code version of
the function is pretty much identical. To avoid code duplication, move
it to mmu.h and convert both regular and early MMU code to use it.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: mmu: Introduce set_domain() ...

Port set_domain() form Linux kernel and share it between regular and
early MMU code to avoid duplication.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: mmu: Introduce set_ttbr() ...

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: create separate mmu_64.h file ...

cpu/mmu.h has nothing in common for the 32bit and 64bit variant. Make it
two separate files.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: aarch64: mmu: Fix TCR setting ...

A BITS_PER_VA value of 33 is a little small. Increase it to 39 which is
the maximum size we can do with 3 level page tables. The TCR value
depends on the current exception level, so we have to calculate the
value during runtime. To do this use a function derived from U-Boots
get_tcr function.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

arm: cpu: add basic arm64 mmu support ...

This commit adds basic mmu support, ie:
        - DMA cache handling is not supported
        - Remapping memory region also

The current mmu setting is:
        - 4KB granularity
        - 3 level lookup (skipping L0)
        - 33 bits per VA

This is based on coreboot and u-boot mmu configuration.

Signed-off-by: Raphael Poggi <poggi.raph@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

arm: move outercase to cpu.c as some SoC as the ux500 always need to flush the l2x0 ...

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM MMU: call __mmu_cache_* as regular C functions ...

Now that __mmu_cache_* restore the registers they can be called
as regular C functions. Create a header file for them and use
C functions rather than inline assembly.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>