The i.MX7 has two pinmux controllers, the regular and the LPSR
controller. The LPSR pinmux controller doesn't have any sel_input
registers, instead they can be found in the regular pinmux controller.
This means whenever we want to apply the the sel_input setting for
the LPSR controller, we have to apply them to the regular controller
instead.
In barebox take the easy way out and just add the difference of the
two base addresses to the register offset. The same issue is present
in the Kernel aswell, but when the bootloader already configured
the pins correctly nobody notices when the Kernel sel_input setup
effectively is a no-op.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Add low-level pad configuration routine that can be used by early boot
code as well as leveraged by pinmux driver.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Add a basic low-level pad configuration function that can be used to
implement early boot pin configuration code as well as shared with
various iomuxv3 and vf610 drivers.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

The FSF address has changed in the past. Instead of updating it
each time the address changes, just drop it completely treewide.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

i.MX6 needs one bit more for PAD_CTRL, so make one free.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

This means using an uint64_t instead of a struct pad_desc which allows
us to change pad settings using logic operations. Also with this we
can more easily keep the iomux tables in sync with the kernel.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

At least partly. We have pads in barebox that we do
not have in the kernel. Also, this with this patch we
do not set the sion bit which the kernel does.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Using these macros simplify the configuration for special GPIO usage. But they
should use correct bit positions for usage in the IOMUX_PAD() macro.

Note: These are the bit positions of the i.MX35 CPU. Not checked for the other
i.MX3x CPUs.

Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>