arm: imx: add initial imx8mp support ...

This adds base support for the i.MX8MP SoC. Not much to do here as this
SoC is quite similar to the i.MX8M. This adds:

- Kconfig symbols
- bootsource detection
- register base address defines
- iomux defines

Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>

treewide: remove references to CREDITS ...

The CREDITS file was removed from barebox in 2015 by commit 6570288f2d97
("Remove the CREDITS file"). Remove references to it from several files.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX8M: Add i.MX8MM support ...

This adds support for the i.MX8MM.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX: esdctl: rename functions to imx8m_* ...

The imx8mq_* functions can be reused for all i.MX8M SoCs, so rename
them accordingly.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX: esdctl: Add memory size detection for i.MX7D ...

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX: esdctl: Add memory size detection for i.MX8MQ ...

Add memory size detection for i.MX8MQ. Only basic LPDDR4
configurations are supported for now. Support for other types of
memory can be added later once we have any boards that use it.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX: esdctl: Add support for i.MX6SoloX's memory controller ...

Add code needed to dynamically detect the offset and amount of RAM.

Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX: esdctl: Add support for Vybrid's memory controller ...

Add code needed to dynamically detect the amount of RAM DDR controller
is configured to use as well as a simple entry function making use of
that functionality.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX: esdctl: Introduce memory_sdram_size() ...

Introduce memory_sdram_size() - subroutine to calculate size of SDRAM
chip base on its parameters such as # or rows, columns, banks and bus
width.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX: esdctl: Make use of min_t() ...

Use min_t() instead of explicit if ().

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX6: esdctl: Use symbolic constants for RAM base address ...

Use symbolic constants for RAM base address, to do that rename
MX6_MMDC_PORT0_BASE_ADDR to MX6_MMDC_PORT01_BASE_ADDR to distinguish
it from SoCs with only one DDR controller (i.MX6UL) where port 0 will
always be at 0x80000000.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX6: esdctl: Factor out common code in imx6*_barebox_entry() ...

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX6: esdctl: Share memory size calculation code ...

Code for calculating total amount of memory found in
imx6_mmdc_add_mem(), imx6q_barebox_entry() and imx6ul_barebox_entry()
is exaclty the same, so refactor the code to avoid duplication.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX51: esdctl: Replace magic value with ESDMISC_DDR2_8_BANK ...

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX: esdctl: Use IOMEM instead of (void *) ...

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM i.MX: Add i.MX6SL support ...

Most i.MX6SL infrastructure is already covered in barebox by general i.MX6
support. Missing infrastructure provided in separate commits are
* SoC type detection
* Clock infrastructure

Add the missing fsl,imx6sl-mmdc, so it will not be catched by fsl,imx6q-mmdc
and the remaining bits and pieces to provide barebox i.MX6SL SoC support.

Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX6 esdctl: Add i.MX6ul support ...

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX: esdctl: Fix wrong driver name ...

The driver should be named imx_esdctl_driver, not imx_serial_driver.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX6: esdctl: Fix memsize calculation for 4GiB/cs ...

On i.MX6 a single chipselect can have 4GiB, which overflows a 32bit
type, so imx6_mmdc_sdram_size() must return a u64 to support this case.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

driver: replace dev_request_mem_region with dev_request_mem_resource ...

dev_request_mem_region doesn't work properly one some SoCs on which
PTR_ERR() values clash with valid return values from dev_request_mem_region.
Replace them with dev_request_mem_resource where possible.

This patch has been generated with the following semantic patch:

// <smpl>
@@
expression d;
expression n;
expression io;
identifier func;
@@
func(...) {
+struct resource *iores;
<+...
-io = dev_request_mem_region(d, n);
-if (IS_ERR(io)) {
+iores = dev_request_mem_resource(d, n);
+if (IS_ERR(iores)) {
...
-	return PTR_ERR(io);
-}
+	return PTR_ERR(iores);
+}
+io = IOMEM(iores->start);
...+>
}

@@
expression d;
expression n;
expression io;
identifier func;
@@
func(...) {
+struct resource *iores;
<+...
-io = dev_request_mem_region(d, n);
-if (IS_ERR(io)) {
+iores = dev_request_mem_resource(d, n);
+if (IS_ERR(iores))
-	return PTR_ERR(io);
-}
+	return PTR_ERR(iores);
+io = IOMEM(iores->start);
...+>
}

@@
expression d;
expression n;
expression io;
identifier func;
@@
func(...) {
+struct resource *iores;
<+...
-io = dev_request_mem_region(d, n);
-if (IS_ERR(io)) {
-	ret = PTR_ERR(io);
+iores = dev_request_mem_resource(d, n);
+if (IS_ERR(iores)) {
+	ret = PTR_ERR(iores);
...
}
+io = IOMEM(iores->start);
...+>
}

@@
expression d;
expression n;
expression io;
identifier func;
@@
func(...) {
+struct resource *iores;
<+...
-io = dev_request_mem_region(d, n);
+iores = dev_request_mem_resource(d, n);
+if (IS_ERR(iores))
+	return PTR_ERR(iores);
+io = IOMEM(iores->start);
...+>
}

@@
identifier func;
@@
func(...) {
<+...
struct resource *iores;
-struct resource *iores;
...+>
}
// </smpl>

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX6: Add i.MX6 entry function ...

Add a i.MX6 specific entry function which automatically detects the SDRAM
size. The prototype has already been present, but it was never implemented.
Rename it to imx6q_ since the other variants need other functions.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

of: use 'const void *' for struct of_device_id.data ...

Since 2011 barebox' of_device_id struct uses unsigned long type for data field:

    struct of_device_id {
            char *compatible;
            unsigned long data;
    };

Almost always struct of_device_id.data field are used as pointer
and need 'unsigned long' casting.

E.g. see 'git grep -A 4 of_device_id drivers/' output:

    drivers/ata/sata-imx.c:static __maybe_unused struct of_device_id imx_sata_dt_ids[] = {
    drivers/ata/sata-imx.c- {
    drivers/ata/sata-imx.c-         .compatible = "fsl,imx6q-ahci",
    drivers/ata/sata-imx.c-         .data = (unsigned long)&data_imx6,
    drivers/ata/sata-imx.c- }, {

Here is of_device_id struct in linux kernel v4.0:

    struct of_device_id {
            char name[32];
            char type[32];
            char compatible[128];
            const void *data;
    };

Changing of_device_id.data type to 'const void *data' will increase
barebox' linux kernel compatibility and decrease number of 'unsigned
long' casts.

Part of the patch was done using the 'coccinelle' tool with the
following semantic patch:

    @rule1@
    identifier dev;
    identifier type;
    identifier func;
    @@
    func(...) {
    <...
    - dev_get_drvdata(dev, (unsigned long *)&type)
    + dev_get_drvdata(dev, (const void **)&type)
    ...>
    }
    @rule2@
    identifier dev;
    identifier type;
    identifier func;
    identifier data;
    @@
    func(...) {
    <...
    - dev_get_drvdata(dev, (unsigned long *)&type->data)
    + dev_get_drvdata(dev, (const void **)&type->data)
    ...>
    }

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX: remove __naked from imx*_barebox_entry ...

Since the stack is already configured when entering imx*_barebox_entry
we can remove the __naked attribute. This fixes some compilation issues
when some of the imx*_barebox_entry got too complicated to compile without
stack.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

sizes.h: move include/sizes.h to include/linux/sizes.h ...

This file originates in Linux.  Linux has it under include/linux/
directory since commit dccd2304cc90.
Let's move it to the same place as well in barebox.

This commit was generated by the following commands:

  find -name '*.[chS]' | xargs sed -i -e 's:<sizes.h>:<linux/sizes.h>:'
  git mv include/sizes.h include/linux/

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

i.MX6: esdctl: Fix a bug in memory probing code ...

Old version of imx6_mmdc_add_mem did not use 64-bit arithmetic and
thus was prone to overflow on systems with 4GB of memory. It also did
not take into account the fact that i.MX6 does not support more than
3.8GB of memory and would report incorrect memory size. This commit
fixes both issues.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

resource: Let dev_request_mem_region return an error pointer ...

For all users fix or add the error check.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX: esdctl: i.MX53 has esdctl v4, not v3 ...

On the i.MX53 this has the effect that in early init only
half of the memory bank is detected and the barebox image
is place in the middle of SDRAM.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: imx: move malloc area to upper memory bank by default ...

If we have two discontinuous memory banks we want to move
the malloc area into the upper bank by default to leave as
much free space in the lower bank, where we have to place
kernel, oftree and initrd.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: change signature of barebox_arm_entry ...

Mostly to make it clear that boarddata needs to be
something we can dereference.

As this is a pretty invasive change, use the opportunity
to make the signature 64bit safe.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

imx6: read back memory size ...

To reduce the devicetree files for one board with different memory sizes the
memory size can be read back from i.MX6.

Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>