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History for barebox / arch / arm / boards / pcm051 / lowlevel.c

2013-12-10	9080ddd Browse files » ARM: am33xx Phytec phyCORE: Switch to multiimage support ... Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Sascha Hauer committed on 10 Dec 2013
2013-12-10	038806d Browse files » ARM: am33xx Phytec phyCORE: initialize debug UART ... Add debug UART initialization to lowlevel init and print a '>'. Helps debugging lowlevel code. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Sascha Hauer committed on 10 Dec 2013
2013-11-22	5a4d275 Browse files » ARM: am33xx: Add am33xx_ prefix to SoC specific functions ... Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Sascha Hauer committed on 22 Nov 2013
2013-11-22	f6b399e Browse files » ARM: OMAP: Add SoC prefix to running_in_* functions ... Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Sascha Hauer committed on 22 Nov 2013
2013-09-05	f1cf443 Browse files » PCM051: Fixup DDRPLL ... The correct DDRPLL for PCM051 is 303MHz. Signed-off-by: Teresa Gámez <t.gamez@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Teresa Gámez authored on 29 Aug 2013 Sascha Hauer committed on 5 Sep 2013
2013-08-27	abd545d Browse files » ARM: am33xx: make DDR PLL frequency configurable ... Needed for 400MHz DDR3. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Sascha Hauer committed on 27 Aug 2013
	0f13bd9 Browse files » ARM: pcm051: Clean up lowlevel code ... Use now the initialisation functions from am33xx_generic. Signed-off-by: Teresa Gámez <t.gamez@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Teresa Gámez authored on 23 Aug 2013 Sascha Hauer committed on 27 Aug 2013
	6550482 Browse files » ARM: omap: fix omap_save_bootinfo ... omap_save_bootinfo derefences the argument passed to barebox without checking it for validity. This breaks 2nd stage booting where r0 is undefined. The best we can do is to check whether the pointer is somewhere in SRAM and is word aligned. This at least makes sure that we do not oops. This introduces SoC specific xxx_save_bootinfo variants since the SRAM addresses/sizes differ between SoCs. Additionally fix the prototype for omap_save_bootinfo. It uses r0, so it must be passed this variable. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Sascha Hauer committed on 27 Aug 2013
2013-08-22	c1b18f6 Browse files » AM33xx: Make OSC frequency board depended ... The oscillator frequency varies on different AM33xx boards. Pass the osc frequency from lowlevel board code to set the correct one on every board. Signed-off-by: Teresa Gámez <t.gamez@phytec.de> Reviewed-by: Jan Luebbe <jlu@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Teresa Gámez authored on 20 Aug 2013 Sascha Hauer committed on 22 Aug 2013
2013-07-10	c5c875a Browse files » arm: omap: store boot source info from ROM loader ... The ROM loader passes the address of a buffer to the MLO in register 0. Store this data so we can find the boot source later. On the same way the bootinformation are passed to the barebox, then. It has to be enshured that r0 contains always the buffer or the boot source detection will not work. Applied this on all OMAPs. This patch is based on work of Jan Luebbe <jlu@pengutronix.de>. Compile tested on all OMAP boards. Tested on pcm049, phyCARD-A-L1 and pcm051. Signed-off-by: Teresa Gámez <t.gamez@phytec.de> Tested-by: Christoph Fritz <chf.fritz@googlemail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Teresa Gámez authored on 9 Jul 2013 Sascha Hauer committed on 10 Jul 2013
	f0c0d46 Browse files » ARM: AM33xx: Make mpu pll configurable by lowlevel board code ... Signed-off-by: Teresa Gámez <t.gamez@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Teresa Gámez authored on 9 Jul 2013 Sascha Hauer committed on 10 Jul 2013
	692db70 Browse files » PCM051: Add first stage support ... This patch adds first stage support for PCM051. Signed-off-by: Shravan kumar <shravan.k@phytec.in> Signed-off-by: Teresa Gámez <t.gamez@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Shravan kumar authored on 9 Jul 2013 Sascha Hauer committed on 10 Jul 2013
2013-02-08	c49819d Browse files » arm: rename reset and common_reset to barebox_arm_reset_vector and arm_cpu_lowlevel_init ... reset is confusing with the cpu reset and impossible to grep Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Jean-Christophe PLAGNIOL-VILLARD authored on 5 Feb 2013 Sascha Hauer committed on 8 Feb 2013
2013-02-04	1c240cd Browse files » ARM OMAP boards: switch to barebox_arm_entry ... All boards use hardcoded SDRAM addresses, copied from the board init file. OMAP3 boards are a bit special, they had a SoC specific reset() function. This is renamed to omap3_invalidate_dcache() and called from the board lowlevel init code now. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Sascha Hauer committed on 4 Feb 2013