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History for barebox / arch / arm / cpu / mmu.c

2011-03-10	cad1448 Browse files » ARM: create a second level page table entry for the exception vectors ... Often enough the exception vectors are not on TEXT_BASE (for example on i.MX SoCs in internal boot mode), so the board specific code did not map the exception vectors to 0x0 but whatever happens to be on TEXT_BASE. Also, the current section-only mapping requires the exception vectors to be on a 1MB boundary. Instead, create the possibility to create second level tables and use this to map a copy of the exception vectors in a board independent way. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Sascha Hauer committed on 10 Mar 2011
2011-03-08	1c33aac Browse files » ARM: use memalign to allocate page table ... We have the proper function for getting aligned memory, so use it. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Sascha Hauer committed on 8 Mar 2011
2011-01-07	c5baa0e Browse files » Fix error handling with malloc, memalign etc. Introduce xmemalign(). ... The idea is to panic() when there is no memory available for normal operation. Exception: code which can consume arbitrary amount of RAM (example: files allocated in ramfs) must report error instead of panic(). This patch also fixes code which didn't check for NULL from malloc() etc. Usage: malloc(), memalign() return NULL when out of RAM. xmalloc(), xmemalign() always return non-NULL or panic(). Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Krzysztof Halasa authored on 6 Jan 2011 Sascha Hauer committed on 7 Jan 2011
2010-10-11	cdd5db4 Browse files » ARM mmu: Call __mmu_cache_flush instead of hardcoded v4/v5 only function ... Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Sascha Hauer committed on 11 Oct 2010
2010-05-03	51b4009 Browse files » ARM: use memalign in dma_alloc_coherent to assure alignment ... Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Sascha Hauer committed on 3 May 2010
2010-03-30	be00ed5 Browse files » add l2x0 cache support ... Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Sascha Hauer committed on 30 Mar 2010
2010-03-30	bcaabae Browse files » ARM: Add a wrapper around dma_* functions ... This is a preparation to add second level cache support. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Sascha Hauer committed on 30 Mar 2010
2010-02-01	3f1bf1f Browse files » Use cache functions from kernel ... These cache functions have been extracted from arch/arm/boot/compressed/head.S. The old code only worked properly on ARMv4. Tested on ARMv4, ARMv5, ARMv6 hardware. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Sascha Hauer committed on 1 Feb 2010
2009-09-25	3820307 Browse files » rename dma macros ... Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Sascha Hauer committed on 25 Sep 2009
2009-08-19	e2c8e8a Browse files » Add MMU support ... Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Sascha Hauer committed on 19 Aug 2009