The FSF address has changed in the past. Instead of updating it
each time the address changes, just drop it completely treewide.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Tested-by: Sanjeev Premi <premi@ti.com>

The X-loader startup relocates to SRAM anyway, so there
is no need to be runnable from flash for the clock code.
This config is disabled in all defconfigs anyway, so remove
it.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Tested-by: Sanjeev Premi <premi@ti.com>

To allow for some generic io accessors introduce io.h and use
this instead of asm/io.h throughout the tree.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

This patch updates the clock dividers for the graphics
processor.

It is based on commit:
    c4e1d9b
    at http://arago-project.org/git/projects/?p=u-boot-omap3.git

Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

In function get_osc_clk_speed(), the SYS_CLK divider
was being changed 'suddenly'.

This change has cascading effect on the derived clocks,
leading to inconsistent behavior - often a crash.

Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

This patch adds the basic clock initizlization for OMAP36XX.

Portion of this patch is based on commit:
    2958722
    at http://arago-project.org/git/projects/?p=x-load-omap3.git

Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

This patch defines functions that contain steps to configure
DPLL for each clock domain.

Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

This patch adds suffix 34x to DPLL tables and related functions to
indicate that they are applicable to OMAP34XX only.

The suffix was required to prepare for support of OMAP36XX in the
subsequent patch series.

Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

This patch updates the DPLL functions to return correct
DPLL table based on the cpu revision.

The DPLL table for PER domain is same across all revisions,
but the function signature has been updated to maintain
consistency in the API definition.

Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Content from monolith implementation in prcm_init() has been
moved into separate functions - per clock domain. This makes
code easy to adapt for silicon revisions and families.

Few cosmetic changes may have been done during this movement.

Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

In omap3_clock_core.S we have just clock values for the ES2
revision, so we should not set any silicon index.

Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

This has been done with the following script:

find -path ./.git -prune -o -type f -print0 | xargs -0 -r sed -i \
	-e 's/u2boot/barebox/g' \
	-e 's/U2Boot/barebox/g' \
	-e 's/U-boot V2/barebox/g' \
	-e 's/u-boot v2/barebox/g' \
	-e 's/U-Boot V2/barebox/g' \
	-e 's/U-Boot-v2/barebox/g' \
	-e 's/U_BOOT/BAREBOX/g' \
	-e 's/UBOOT/BAREBOX/g' \
	-e 's/uboot/barebox/g' \
	-e 's/u-boot/barebox/g' \
	-e 's/u_boot/barebox/g' \
	-e 's/U-Boot/barebox/g' \
	-e 's/U-boot/barebox/g' \
	-e 's/U-BOOT/barebox/g'

find -path ./.git -prune -o \( -name "*u-boot*" -o -name "*uboot*" -o -name "*u_boot*" \) -print0 | \
	xargs -0 -r rename 's/u[-_]?boot/barebox/'

It needs some manual fixup following in the next patch

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

the place. This clean up all ARM architectures to use only one set
of io functions.

Signed-off-by: Juergen Beisert <j.beisert@pengutronix.de>

[Patch 12/17] U-Boot-V2:ARM:OMAP3: Add support for OMAP3 Silicon files

This patch introduces support for OMAP3430 clocking infrastructure. Please note that SRAM based configuration requires GPMC values to be updated before returning to caller- TBD.

Signed-off-by: Nishanth Menon<x0nishan@ti.com>